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[PULL 32/54] target/riscv: remove kvm-stub.c
From: |
Alistair Francis |
Subject: |
[PULL 32/54] target/riscv: remove kvm-stub.c |
Date: |
Thu, 12 Oct 2023 14:10:29 +1000 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
This file is not needed for some time now. Both kvm_riscv_reset_vcpu()
and kvm_riscv_set_irq() have public declarations in kvm_riscv.h and are
wrapped in 'if kvm_enabled()' blocks that the compiler will rip it out
in non-KVM builds.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20230925175709.35696-11-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/kvm-stub.c | 30 ------------------------------
target/riscv/meson.build | 2 +-
2 files changed, 1 insertion(+), 31 deletions(-)
delete mode 100644 target/riscv/kvm-stub.c
diff --git a/target/riscv/kvm-stub.c b/target/riscv/kvm-stub.c
deleted file mode 100644
index 4e8fc31a21..0000000000
--- a/target/riscv/kvm-stub.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * QEMU KVM RISC-V specific function stubs
- *
- * Copyright (c) 2020 Huawei Technologies Co., Ltd
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2 or later, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program. If not, see <http://www.gnu.org/licenses/>.
- */
-#include "qemu/osdep.h"
-#include "cpu.h"
-#include "kvm_riscv.h"
-
-void kvm_riscv_reset_vcpu(RISCVCPU *cpu)
-{
- abort();
-}
-
-void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level)
-{
- abort();
-}
diff --git a/target/riscv/meson.build b/target/riscv/meson.build
index b4ded65e41..b30ebf5795 100644
--- a/target/riscv/meson.build
+++ b/target/riscv/meson.build
@@ -24,7 +24,7 @@ riscv_ss.add(files(
'zce_helper.c',
'vcrypto_helper.c'
))
-riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false:
files('kvm-stub.c'))
+riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
riscv_system_ss = ss.source_set()
riscv_system_ss.add(files(
--
2.41.0
- [PULL 22/54] disas/riscv: Fix the typo of inverted order of pmpaddr13 and pmpaddr14, (continued)
- [PULL 22/54] disas/riscv: Fix the typo of inverted order of pmpaddr13 and pmpaddr14, Alistair Francis, 2023/10/12
- [PULL 23/54] target/riscv: introduce TCG AccelCPUClass, Alistair Francis, 2023/10/12
- [PULL 24/54] target/riscv: move riscv_cpu_realize_tcg() to TCG::cpu_realizefn(), Alistair Francis, 2023/10/12
- [PULL 26/54] target/riscv: move riscv_tcg_ops to tcg-cpu.c, Alistair Francis, 2023/10/12
- [PULL 25/54] target/riscv: move riscv_cpu_validate_set_extensions() to tcg-cpu.c, Alistair Francis, 2023/10/12
- [PULL 27/54] target/riscv/cpu.c: add .instance_post_init(), Alistair Francis, 2023/10/12
- [PULL 28/54] target/riscv: move 'host' CPU declaration to kvm.c, Alistair Francis, 2023/10/12
- [PULL 29/54] target/riscv/cpu.c: mark extensions arrays as 'const', Alistair Francis, 2023/10/12
- [PULL 30/54] target/riscv: move riscv_cpu_add_kvm_properties() to kvm.c, Alistair Francis, 2023/10/12
- [PULL 31/54] target/riscv: make riscv_add_satp_mode_properties() public, Alistair Francis, 2023/10/12
- [PULL 32/54] target/riscv: remove kvm-stub.c,
Alistair Francis <=
- [PULL 33/54] target/riscv: introduce KVM AccelCPUClass, Alistair Francis, 2023/10/12
- [PULL 34/54] target/riscv: move KVM only files to kvm subdir, Alistair Francis, 2023/10/12
- [PULL 35/54] target/riscv/kvm: do not use riscv_cpu_add_misa_properties(), Alistair Francis, 2023/10/12
- [PULL 36/54] target/riscv/cpu.c: export set_misa(), Alistair Francis, 2023/10/12
- [PULL 37/54] target/riscv/tcg: introduce tcg_cpu_instance_init(), Alistair Francis, 2023/10/12
- [PULL 38/54] target/riscv/cpu.c: make misa_ext_cfgs[] 'const', Alistair Francis, 2023/10/12
- [PULL 39/54] target/riscv/tcg: move riscv_cpu_add_misa_properties() to tcg-cpu.c, Alistair Francis, 2023/10/12
- [PULL 40/54] target/riscv/cpu.c: export isa_edata_arr[], Alistair Francis, 2023/10/12
- [PULL 41/54] target/riscv/cpu: move priv spec functions to tcg-cpu.c, Alistair Francis, 2023/10/12
- [PULL 42/54] target/riscv: add riscv_cpu_get_name(), Alistair Francis, 2023/10/12