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[PULL 12/54] target/riscv: deprecate the 'any' CPU type
From: |
Alistair Francis |
Subject: |
[PULL 12/54] target/riscv: deprecate the 'any' CPU type |
Date: |
Thu, 12 Oct 2023 14:10:09 +1000 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
The 'any' CPU type was introduced in commit dc5bd18fa5725 ("RISC-V CPU
Core Definition"), being around since the beginning. It's not an easy
CPU to use: it's undocumented and its name doesn't tell users much about
what the CPU is supposed to bring. 'git log' doesn't help us either in
knowing what was the original design of this CPU type.
The closest we have is a comment from Alistair [1] where he recalls from
memory that the 'any' CPU is supposed to behave like the newly added
'max' CPU. He also suggested that the 'any' CPU should be removed.
The default CPUs are rv32 and rv64, so removing the 'any' CPU will have
impact only on users that might have a script that uses '-cpu any'.
And those users are better off using the default CPUs or the new 'max'
CPU.
We would love to just remove the code and be done with it, but one does
not simply remove a feature in QEMU. We'll put the CPU in quarantine
first, letting users know that we have the intent of removing it in the
future.
[1] https://lists.gnu.org/archive/html/qemu-devel/2023-07/msg02891.html
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20230912132423.268494-13-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
docs/about/deprecated.rst | 12 ++++++++++++
target/riscv/cpu.c | 5 +++++
2 files changed, 17 insertions(+)
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
index 8b136320e2..5e3965a674 100644
--- a/docs/about/deprecated.rst
+++ b/docs/about/deprecated.rst
@@ -327,6 +327,18 @@ QEMU's ``vhost`` feature, which would eliminate the high
latency costs under
which the 9p ``proxy`` backend currently suffers. However as of to date nobody
has indicated plans for such kind of reimplementation unfortunately.
+RISC-V 'any' CPU type ``-cpu any`` (since 8.2)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The 'any' CPU type was introduced back in 2018 and has been around since the
+initial RISC-V QEMU port. Its usage has always been unclear: users don't know
+what to expect from a CPU called 'any', and in fact the CPU does not do
anything
+special that isn't already done by the default CPUs rv32/rv64.
+
+After the introduction of the 'max' CPU type, RISC-V now has a good coverage
+of generic CPUs: rv32 and rv64 as default CPUs and 'max' as a feature complete
+CPU for both 32 and 64 bit builds. Users are then discouraged to use the 'any'
+CPU type starting in 8.2.
Block device options
''''''''''''''''''''
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index c9de7ddb4e..115c2d2fa4 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1522,6 +1522,11 @@ static void riscv_cpu_realize(DeviceState *dev, Error
**errp)
RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(dev);
Error *local_err = NULL;
+ if (object_dynamic_cast(OBJECT(dev), TYPE_RISCV_CPU_ANY) != NULL) {
+ warn_report("The 'any' CPU is deprecated and will be "
+ "removed in the future.");
+ }
+
cpu_exec_realizefn(cs, &local_err);
if (local_err != NULL) {
error_propagate(errp, local_err);
--
2.41.0
- [PULL 00/54] riscv-to-apply queue, Alistair Francis, 2023/10/12
- [PULL 01/54] target/riscv/cpu.c: split CPU options from riscv_cpu_extensions[], Alistair Francis, 2023/10/12
- [PULL 02/54] target/riscv/cpu.c: skip 'bool' check when filtering KVM props, Alistair Francis, 2023/10/12
- [PULL 03/54] target/riscv/cpu.c: split kvm prop handling to its own helper, Alistair Francis, 2023/10/12
- [PULL 04/54] target/riscv: add DEFINE_PROP_END_OF_LIST() to riscv_cpu_options[], Alistair Francis, 2023/10/12
- [PULL 05/54] target/riscv/cpu.c: split non-ratified exts from riscv_cpu_extensions[], Alistair Francis, 2023/10/12
- [PULL 08/54] target/riscv/cpu.c: add riscv_cpu_add_kvm_unavail_prop_array(), Alistair Francis, 2023/10/12
- [PULL 07/54] target/riscv/cpu.c: add riscv_cpu_add_qdev_prop_array(), Alistair Francis, 2023/10/12
- [PULL 11/54] avocado, risc-v: add tuxboot tests for 'max' CPU, Alistair Francis, 2023/10/12
- [PULL 10/54] target/riscv: add 'max' CPU type, Alistair Francis, 2023/10/12
- [PULL 12/54] target/riscv: deprecate the 'any' CPU type,
Alistair Francis <=
- [PULL 13/54] target/riscv/cpu.c: use offset in isa_ext_is_enabled/update_enabled, Alistair Francis, 2023/10/12
- [PULL 14/54] target/riscv: make CPUCFG() macro public, Alistair Francis, 2023/10/12
- [PULL 06/54] target/riscv/cpu.c: split vendor exts from riscv_cpu_extensions[], Alistair Francis, 2023/10/12
- [PULL 09/54] target/riscv/cpu.c: limit cfg->vext_spec log message, Alistair Francis, 2023/10/12
- [PULL 16/54] target/riscv/cpu.c: use cpu_cfg_ext_auto_update() during realize(), Alistair Francis, 2023/10/12
- [PULL 15/54] target/riscv/cpu.c: introduce cpu_cfg_ext_auto_update(), Alistair Francis, 2023/10/12
- [PULL 17/54] target/riscv/cpu.c: introduce RISCVCPUMultiExtConfig, Alistair Francis, 2023/10/12