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[PULL 42/55] hw/isa/piix3: Add size constraints to rcr_ops
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 42/55] hw/isa/piix3: Add size constraints to rcr_ops |
Date: |
Sun, 30 Oct 2022 23:28:28 +0100 |
From: Bernhard Beschow <shentey@gmail.com>
According to the PIIX3 datasheet, the reset control register is one byte in
size.
Moreover, PIIX4 has it, so add it to PIIX3 as well.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221022150508.26830-5-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/isa/piix3.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 04895ce2e5..72dbf688d9 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -290,7 +290,11 @@ static uint64_t rcr_read(void *opaque, hwaddr addr,
unsigned len)
static const MemoryRegionOps rcr_ops = {
.read = rcr_read,
.write = rcr_write,
- .endianness = DEVICE_LITTLE_ENDIAN
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 1,
+ },
};
static void pci_piix3_realize(PCIDevice *dev, Error **errp)
--
2.37.3
- [PULL 32/55] disas/nanomips: Prevent memory leaking, (continued)
- [PULL 32/55] disas/nanomips: Prevent memory leaking, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 33/55] disas/nanomips: Remove function overloading, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 34/55] disas/nanomips: Expand Dis_info struct, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 35/55] disas/nanomips: Replace exception handling, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 36/55] disas/nanomips: Replace Cpp enums for C enums, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 37/55] disas/nanomips: Remove argument passing by ref, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 38/55] disas/nanomips: Rename nanomips.cpp to nanomips.c, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 39/55] disas/mips: Fix branch displacement for BEQZC and BNEZC, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 40/55] hw/i386/pc: Create DMA controllers in south bridges, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 41/55] hw/isa/piix3: Remove extra ';' outside of functions, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 42/55] hw/isa/piix3: Add size constraints to rcr_ops,
Philippe Mathieu-Daudé <=
- [PULL 44/55] hw/isa/piix3: Prefer pci_address_space() over get_system_memory(), Philippe Mathieu-Daudé, 2022/10/30
- [PULL 45/55] hw/isa/piix4: Rename wrongly named method, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 46/55] hw/ide/piix: Introduce TYPE_ macros for PIIX IDE controllers, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 43/55] hw/isa/piix3: Modernize reset handling, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 47/55] hw/isa/piix3: Remove unused include, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 48/55] hw/mips/malta: Reuse dev variable, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 49/55] hw/isa/Kconfig: Fix dependencies of piix4 southbridge, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 51/55] hw/isa/piix4: Move pci_ide_create_devs() call to board code, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 50/55] hw/isa/piix4: Add missing initialization, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 52/55] hw/mips/boston: Don't set link_up for xilinx-pcie, Philippe Mathieu-Daudé, 2022/10/30