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[PULL 40/55] hw/i386/pc: Create DMA controllers in south bridges
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 40/55] hw/i386/pc: Create DMA controllers in south bridges |
Date: |
Sun, 30 Oct 2022 23:28:26 +0100 |
From: Bernhard Beschow <shentey@gmail.com>
Just like in the real hardware (and in PIIX4), create the DMA
controllers in the south bridges.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221022150508.26830-2-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/i386/pc.c | 3 ---
hw/i386/pc_piix.c | 2 ++
hw/isa/Kconfig | 2 ++
hw/isa/lpc_ich9.c | 3 +++
hw/isa/piix3.c | 9 +++++++--
5 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 768982ae9a..b39ecd4d0c 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -47,7 +47,6 @@
#include "multiboot.h"
#include "hw/rtc/mc146818rtc.h"
#include "hw/intc/i8259.h"
-#include "hw/dma/i8257.h"
#include "hw/timer/i8254.h"
#include "hw/input/i8042.h"
#include "hw/irq.h"
@@ -1320,8 +1319,6 @@ void pc_basic_device_init(struct PCMachineState *pcms,
pcspk_init(pcms->pcspk, isa_bus, pit);
}
- i8257_dma_init(isa_bus, 0);
-
/* Super I/O */
pc_superio_init(isa_bus, create_fdctrl, pcms->i8042_enabled,
pcms->vmport != ON_OFF_AUTO_ON);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 0b1a79c0fa..7a55b9ca8e 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -26,6 +26,7 @@
#include CONFIG_DEVICES
#include "qemu/units.h"
+#include "hw/dma/i8257.h"
#include "hw/loader.h"
#include "hw/i386/x86.h"
#include "hw/i386/pc.h"
@@ -225,6 +226,7 @@ static void pc_init1(MachineState *machine,
pci_bus = NULL;
isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
&error_abort);
+ i8257_dma_init(isa_bus, 0);
pcms->hpet_enabled = false;
}
isa_bus_irqs(isa_bus, x86ms->gsi);
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig
index 20de7e9294..60aad28800 100644
--- a/hw/isa/Kconfig
+++ b/hw/isa/Kconfig
@@ -33,6 +33,7 @@ config PC87312
config PIIX3
bool
+ select I8257
select ISA_BUS
config PIIX4
@@ -68,6 +69,7 @@ config LPC_ICH9
bool
# For historical reasons, SuperIO devices are created in the board
# for ICH9.
+ select I8257
select ISA_BUS
select ACPI_SMBUS
select ACPI_X86_ICH
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 4553b5925b..8694e58b21 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -34,6 +34,7 @@
#include "qapi/error.h"
#include "qapi/visitor.h"
#include "qemu/range.h"
+#include "hw/dma/i8257.h"
#include "hw/isa/isa.h"
#include "migration/vmstate.h"
#include "hw/irq.h"
@@ -722,6 +723,8 @@ static void ich9_lpc_realize(PCIDevice *d, Error **errp)
qdev_init_gpio_out_named(dev, lpc->gsi, ICH9_GPIO_GSI, GSI_NUM_PINS);
isa_bus_irqs(isa_bus, lpc->gsi);
+
+ i8257_dma_init(isa_bus, 0);
}
static bool ich9_rst_cnt_needed(void *opaque)
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 48f9ab1096..44a9998752 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -25,6 +25,7 @@
#include "qemu/osdep.h"
#include "qemu/range.h"
#include "qapi/error.h"
+#include "hw/dma/i8257.h"
#include "hw/southbridge/piix.h"
#include "hw/irq.h"
#include "hw/isa/isa.h"
@@ -295,9 +296,11 @@ static const MemoryRegionOps rcr_ops = {
static void pci_piix3_realize(PCIDevice *dev, Error **errp)
{
PIIX3State *d = PIIX3_PCI_DEVICE(dev);
+ ISABus *isa_bus;
- if (!isa_bus_new(DEVICE(d), get_system_memory(),
- pci_address_space_io(dev), errp)) {
+ isa_bus = isa_bus_new(DEVICE(d), get_system_memory(),
+ pci_address_space_io(dev), errp);
+ if (!isa_bus) {
return;
}
@@ -307,6 +310,8 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
PIIX_RCR_IOPORT, &d->rcr_mem, 1);
qemu_register_reset(piix3_reset, d);
+
+ i8257_dma_init(isa_bus, 0);
}
static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
--
2.37.3
- [PULL 29/55] disas/nanomips: Replace std::string type, (continued)
- [PULL 29/55] disas/nanomips: Replace std::string type, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 31/55] disas/nanomips: Remove CPR function, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 32/55] disas/nanomips: Prevent memory leaking, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 33/55] disas/nanomips: Remove function overloading, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 34/55] disas/nanomips: Expand Dis_info struct, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 35/55] disas/nanomips: Replace exception handling, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 36/55] disas/nanomips: Replace Cpp enums for C enums, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 37/55] disas/nanomips: Remove argument passing by ref, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 38/55] disas/nanomips: Rename nanomips.cpp to nanomips.c, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 39/55] disas/mips: Fix branch displacement for BEQZC and BNEZC, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 40/55] hw/i386/pc: Create DMA controllers in south bridges,
Philippe Mathieu-Daudé <=
- [PULL 41/55] hw/isa/piix3: Remove extra ';' outside of functions, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 42/55] hw/isa/piix3: Add size constraints to rcr_ops, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 44/55] hw/isa/piix3: Prefer pci_address_space() over get_system_memory(), Philippe Mathieu-Daudé, 2022/10/30
- [PULL 45/55] hw/isa/piix4: Rename wrongly named method, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 46/55] hw/ide/piix: Introduce TYPE_ macros for PIIX IDE controllers, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 43/55] hw/isa/piix3: Modernize reset handling, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 47/55] hw/isa/piix3: Remove unused include, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 48/55] hw/mips/malta: Reuse dev variable, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 49/55] hw/isa/Kconfig: Fix dependencies of piix4 southbridge, Philippe Mathieu-Daudé, 2022/10/30
- [PULL 51/55] hw/isa/piix4: Move pci_ide_create_devs() call to board code, Philippe Mathieu-Daudé, 2022/10/30