[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 00/10] target-arm queue
From: |
Peter Maydell |
Subject: |
[PULL 00/10] target-arm queue |
Date: |
Fri, 30 Sep 2022 14:35:01 +0100 |
Hi; not so many patches in this one, but notably it includes the
fix for various Avocado CI tests failing (incorrectly reported by
Avocado as a timeout, but really a QEMU exit-with-error).
thanks
-- PMM
The following changes since commit c8de6ec63d766ca1998c5af468483ce912fdc0c2:
Merge tag 'pull-request-2022-09-28' of https://gitlab.com/thuth/qemu into
staging (2022-09-28 17:04:11 -0400)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20220930
for you to fetch changes up to beeec926d24aac28f95cc7694ef3837d7a4cd3bb:
target/arm: mark SP_EL1 with ARM_CP_EL3_NO_EL2_KEEP (2022-09-29 18:01:09
+0100)
----------------------------------------------------------------
target-arm queue:
* Fix breakage of icount mode when guest touches MDCR_EL3, MDCR_EL2,
PMCNTENSET_EL0 or PMCNTENCLR_EL0
* Make writes to MDCR_EL3 use PMU start/finish calls
* Let AArch32 write to SDCR.SCCD
* Rearrange cpu64.c so all the CPU initfns are together
* hw/arm/xlnx-zynqmp: Connect ZynqMP's USB controllers
* hw/arm/virt: fix some minor issues with generated device tree
* Fix regression where EL3 could not write to SP_EL1 if there is no EL2
----------------------------------------------------------------
Francisco Iglesias (1):
hw/arm/xlnx-zynqmp: Connect ZynqMP's USB controllers
Jean-Philippe Brucker (4):
hw/arm/virt: Fix devicetree warning about the root node
hw/arm/virt: Fix devicetree warning about the GIC node
hw/arm/virt: Use "msi-map" devicetree property for PCI
hw/arm/virt: Fix devicetree warning about the SMMU node
Jerome Forissier (1):
target/arm: mark SP_EL1 with ARM_CP_EL3_NO_EL2_KEEP
Peter Maydell (4):
target/arm: Mark registers which call pmu_op_start() as ARM_CP_IO
target/arm: Make writes to MDCR_EL3 use PMU start/finish calls
target/arm: Update SDCR_VALID_MASK to include SCCD
target/arm: Rearrange cpu64.c so all the CPU initfns are together
include/hw/arm/xlnx-zynqmp.h | 3 +
target/arm/cpu.h | 8 +-
hw/arm/virt.c | 8 +-
hw/arm/xlnx-zynqmp.c | 36 +++
target/arm/cpu64.c | 712 +++++++++++++++++++++----------------------
target/arm/helper.c | 32 +-
6 files changed, 427 insertions(+), 372 deletions(-)
- [PULL 00/10] target-arm queue,
Peter Maydell <=
- [PULL 01/10] target/arm: Mark registers which call pmu_op_start() as ARM_CP_IO, Peter Maydell, 2022/09/30
- [PULL 04/10] target/arm: Rearrange cpu64.c so all the CPU initfns are together, Peter Maydell, 2022/09/30
- [PULL 05/10] hw/arm/xlnx-zynqmp: Connect ZynqMP's USB controllers, Peter Maydell, 2022/09/30
- [PULL 06/10] hw/arm/virt: Fix devicetree warning about the root node, Peter Maydell, 2022/09/30
- [PULL 08/10] hw/arm/virt: Use "msi-map" devicetree property for PCI, Peter Maydell, 2022/09/30
- [PULL 07/10] hw/arm/virt: Fix devicetree warning about the GIC node, Peter Maydell, 2022/09/30
- [PULL 09/10] hw/arm/virt: Fix devicetree warning about the SMMU node, Peter Maydell, 2022/09/30
- [PULL 10/10] target/arm: mark SP_EL1 with ARM_CP_EL3_NO_EL2_KEEP, Peter Maydell, 2022/09/30
- [PULL 02/10] target/arm: Make writes to MDCR_EL3 use PMU start/finish calls, Peter Maydell, 2022/09/30
- [PULL 03/10] target/arm: Update SDCR_VALID_MASK to include SCCD, Peter Maydell, 2022/09/30