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Re: [PATCH 28/37] target/i386: reimplement 0x0f 0x38, add AVX
From: |
Paolo Bonzini |
Subject: |
Re: [PATCH 28/37] target/i386: reimplement 0x0f 0x38, add AVX |
Date: |
Wed, 14 Sep 2022 19:04:29 +0200 |
On Tue, Sep 13, 2022 at 11:31 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
> > +void glue(helper_vpmaskmovq_st, SUFFIX)(CPUX86State *env,
> > + Reg *v, Reg *s, target_ulong a0)
> > +{
> > + int i;
> > +
> > + for (i = 0; i < (1 << SHIFT); i++) {
> > + if (v->Q(i) >> 63) {
> > + cpu_stq_data_ra(env, a0 + i * 8, s->Q(i), GETPC());
> > + }
> > + }
> > +}
>
> Any idea if hw will write incomplete data if the pieces cross page
> boundaries, and the
> second page is invalid? We're not good at that for any other vector sized
> write, though,
> so not critical.
No, I will check.
> > +void glue(helper_vpgatherdd, SUFFIX)(CPUX86State *env,
> > + Reg *d, Reg *v, Reg *s, target_ulong a0, unsigned scale)
> > +{
> > + int i;
> > + for (i = 0; i < (2 << SHIFT); i++) {
> > + if (v->L(i) >> 31) {
> > + target_ulong addr = a0
> > + + ((target_ulong)(int32_t)s->L(i) << scale);
> > + d->L(i) = cpu_ldl_data_ra(env, addr, GETPC());
> > + }
> > + v->L(i) = 0;
> > + }
> > +}
>
> Better to not modify registers until all potential #GP are raised.
This is actually intentional: elements of v are zeroes whenever an
element is read successfully, so that values are not reread when the
instruction restarts. The manual says "If a fault is triggered by an
element and delivered, all elements closer to the LSB of the
destination zmm will be completed".
Paolo
[PATCH 29/37] target/i386: reimplement 0x0f 0xc2, 0xc4-0xc6, add AVX, Paolo Bonzini, 2022/09/11
[PATCH 31/37] target/i386: reimplement 0x0f 0x28-0x2f, add AVX, Paolo Bonzini, 2022/09/11
[PATCH 30/37] target/i386: reimplement 0x0f 0x10-0x17, add AVX, Paolo Bonzini, 2022/09/11
Re: [PATCH 30/37] target/i386: reimplement 0x0f 0x10-0x17, add AVX, Richard Henderson, 2022/09/13