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[PULL 08/32] target/arm: Set ID_DFR0.PerfMon for qemu-system-arm -cpu ma
From: |
Peter Maydell |
Subject: |
[PULL 08/32] target/arm: Set ID_DFR0.PerfMon for qemu-system-arm -cpu max |
Date: |
Mon, 9 May 2022 12:58:24 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
We set this for qemu-system-aarch64, but failed to do so
for the strictly 32-bit emulation.
Fixes: 3bec78447a9 ("target/arm: Provide ARMv8.4-PMU in '-cpu max'")
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220506180242.216785-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu_tcg.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
index f9094c17525..9aa2f737c1e 100644
--- a/target/arm/cpu_tcg.c
+++ b/target/arm/cpu_tcg.c
@@ -1084,6 +1084,10 @@ static void arm_max_initfn(Object *obj)
t = FIELD_DP32(t, ID_PFR2, SSBS, 1);
cpu->isar.id_pfr2 = t;
+ t = cpu->isar.id_dfr0;
+ t = FIELD_DP32(t, ID_DFR0, PERFMON, 5); /* v8.4-PMU */
+ cpu->isar.id_dfr0 = t;
+
#ifdef CONFIG_USER_ONLY
/*
* Break with true ARMv8 and add back old-style VFP short-vector support.
--
2.25.1
- [PULL 03/32] target/arm: Drop EL3 no EL2 fallbacks, (continued)
- [PULL 03/32] target/arm: Drop EL3 no EL2 fallbacks, Peter Maydell, 2022/05/09
- [PULL 04/32] target/arm: Merge zcr reginfo, Peter Maydell, 2022/05/09
- [PULL 05/32] target/arm: Adjust definition of CONTEXTIDR_EL2, Peter Maydell, 2022/05/09
- [PULL 02/32] target/arm: Handle cpreg registration for missing EL, Peter Maydell, 2022/05/09
- [PULL 06/32] target/arm: Move cortex impdef sysregs to cpu_tcg.c, Peter Maydell, 2022/05/09
- [PULL 09/32] target/arm: Split out aa32_max_features, Peter Maydell, 2022/05/09
- [PULL 10/32] target/arm: Annotate arm_max_initfn with FEAT identifiers, Peter Maydell, 2022/05/09
- [PULL 11/32] target/arm: Use field names for manipulating EL2 and EL3 modes, Peter Maydell, 2022/05/09
- [PULL 12/32] target/arm: Enable FEAT_Debugv8p2 for -cpu max, Peter Maydell, 2022/05/09
- [PULL 07/32] target/arm: Update qemu-system-arm -cpu max to cortex-a57, Peter Maydell, 2022/05/09
- [PULL 08/32] target/arm: Set ID_DFR0.PerfMon for qemu-system-arm -cpu max,
Peter Maydell <=
- [PULL 15/32] target/arm: Enable SCR and HCR bits for RAS, Peter Maydell, 2022/05/09
- [PULL 17/32] target/arm: Implement ESB instruction, Peter Maydell, 2022/05/09
- [PULL 16/32] target/arm: Implement virtual SError exceptions, Peter Maydell, 2022/05/09
- [PULL 19/32] target/arm: Enable FEAT_IESB for -cpu max, Peter Maydell, 2022/05/09
- [PULL 20/32] target/arm: Enable FEAT_CSV2 for -cpu max, Peter Maydell, 2022/05/09
- [PULL 18/32] target/arm: Enable FEAT_RAS for -cpu max, Peter Maydell, 2022/05/09
- [PULL 21/32] target/arm: Enable FEAT_CSV2_2 for -cpu max, Peter Maydell, 2022/05/09
- [PULL 22/32] target/arm: Enable FEAT_CSV3 for -cpu max, Peter Maydell, 2022/05/09
- [PULL 24/32] target/arm: Define cortex-a76, Peter Maydell, 2022/05/09
- [PULL 23/32] target/arm: Enable FEAT_DGH for -cpu max, Peter Maydell, 2022/05/09