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[PATCH 8/8] ppc/ppc405: Dump specific registers
From: |
Cédric Le Goater |
Subject: |
[PATCH 8/8] ppc/ppc405: Dump specific registers |
Date: |
Wed, 22 Dec 2021 07:40:25 +0100 |
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/cpu_init.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 9ef9a1a5ddd5..8f6a58e82483 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -8689,6 +8689,17 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, int flags)
* they can be read with "p $ivor0", "p $ivor1", etc.
*/
}
+ if (env->excp_model == POWERPC_EXCP_40x) {
+ qemu_fprintf(f, " TCR " TARGET_FMT_lx " TSR " TARGET_FMT_lx
+ " ESR " TARGET_FMT_lx " DEAR " TARGET_FMT_lx "\n",
+ env->spr[SPR_40x_TCR], env->spr[SPR_40x_TSR],
+ env->spr[SPR_40x_ESR], env->spr[SPR_40x_DEAR]);
+
+ qemu_fprintf(f, " EVPR " TARGET_FMT_lx " SRR2 " TARGET_FMT_lx
+ " SRR3 " TARGET_FMT_lx " PID " TARGET_FMT_lx "\n",
+ env->spr[SPR_40x_EVPR], env->spr[SPR_40x_SRR2],
+ env->spr[SPR_40x_SRR3], env->spr[SPR_40x_PID]);
+ }
#if defined(TARGET_PPC64)
if (env->flags & POWERPC_FLAG_CFAR) {
--
2.31.1
- [PATCH 4/8] ppc/ppc405: Restore TCR and STR write handlers, (continued)
- [PATCH 4/8] ppc/ppc405: Restore TCR and STR write handlers, Cédric Le Goater, 2021/12/22
- [PATCH 5/8] ppc/ppc405: Rework ppc_40x_timers_init() to use a PowerPCCPU, Cédric Le Goater, 2021/12/22
- [PATCH 6/8] ppc/ppc405: Fix timer initialization, Cédric Le Goater, 2021/12/22
- [PATCH 7/8] ppc/ppc405: Introduce a store helper for SPR_40x_PID, Cédric Le Goater, 2021/12/22
- [PATCH 2/8] ppc/ppc4xx: Convert printfs(), Cédric Le Goater, 2021/12/22
- [PATCH 8/8] ppc/ppc405: Dump specific registers,
Cédric Le Goater <=