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[PULL 074/102] ppc/ppc405: Add update of bi_procfreq field
From: |
Cédric Le Goater |
Subject: |
[PULL 074/102] ppc/ppc405: Add update of bi_procfreq field |
Date: |
Wed, 15 Dec 2021 18:03:29 +0100 |
Adapt the fields offset in the board information for Linux. Since
Linux relies on the CPU frequency value, I wonder how it ever worked.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20211206103712.1866296-15-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/ppc/ppc405_uc.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
index 2a1e2d71b08b..ec97b22bd019 100644
--- a/hw/ppc/ppc405_uc.c
+++ b/hw/ppc/ppc405_uc.c
@@ -102,12 +102,13 @@ static ram_addr_t __ppc405_set_bootinfo(CPUPPCState *env,
ppc4xx_bd_info_t *bd)
for (i = 0; i < 32; i++) {
stb_phys(cs->as, bdloc + 0x3C + i, bd->bi_r_version[i]);
}
- stl_be_phys(cs->as, bdloc + 0x5C, bd->bi_plb_busfreq);
- stl_be_phys(cs->as, bdloc + 0x60, bd->bi_pci_busfreq);
+ stl_be_phys(cs->as, bdloc + 0x5C, bd->bi_procfreq);
+ stl_be_phys(cs->as, bdloc + 0x60, bd->bi_plb_busfreq);
+ stl_be_phys(cs->as, bdloc + 0x64, bd->bi_pci_busfreq);
for (i = 0; i < 6; i++) {
- stb_phys(cs->as, bdloc + 0x64 + i, bd->bi_pci_enetaddr[i]);
+ stb_phys(cs->as, bdloc + 0x68 + i, bd->bi_pci_enetaddr[i]);
}
- n = 0x6A;
+ n = 0x70; /* includes 2 bytes hole */
for (i = 0; i < 6; i++) {
stb_phys(cs->as, bdloc + n++, bd->bi_pci_enetaddr2[i]);
}
--
2.31.1
- [PULL 059/102] target/ppc: Set 601v exception model id, (continued)
- [PULL 059/102] target/ppc: Set 601v exception model id, Cédric Le Goater, 2021/12/15
- [PULL 066/102] ppc/ppc405: Change ppc405ep_init() return value, Cédric Le Goater, 2021/12/15
- [PULL 057/102] target/ppc: Fix MPCxxx FPU interrupt address, Cédric Le Goater, 2021/12/15
- [PULL 052/102] target/ppc: Update fres to new flags and float64r32, Cédric Le Goater, 2021/12/15
- [PULL 045/102] target/ppc: Update fre to new flags, Cédric Le Goater, 2021/12/15
- [PULL 060/102] target/ppc: remove 401/403 CPUs, Cédric Le Goater, 2021/12/15
- [PULL 064/102] ppc/ppc405: Convert printfs to trace-events, Cédric Le Goater, 2021/12/15
- [PULL 069/102] ppc/ppc405: Rework FW load, Cédric Le Goater, 2021/12/15
- [PULL 063/102] ppc: Add trace-events for DCR accesses, Cédric Le Goater, 2021/12/15
- [PULL 073/102] ppc/ppc405: Fix bi_pci_enetaddr2 field in U-Boot board information, Cédric Le Goater, 2021/12/15
- [PULL 074/102] ppc/ppc405: Add update of bi_procfreq field,
Cédric Le Goater <=
- [PULL 068/102] ppc/ppc405: Remove flash support, Cédric Le Goater, 2021/12/15
- [PULL 067/102] ppc/ppc405: Add some address space definitions, Cédric Le Goater, 2021/12/15
- [PULL 070/102] ppc/ppc405: Introduce ppc405_set_default_bootinfo(), Cédric Le Goater, 2021/12/15
- [PULL 075/102] target/ppc: Fix xs{max, min}[cj]dp to use VSX registers, Cédric Le Goater, 2021/12/15
- [PULL 065/102] ppc/ppc405: Drop flag parameter in ppc405_set_bootinfo(), Cédric Le Goater, 2021/12/15
- [PULL 071/102] ppc/ppc405: Fix boot from kernel, Cédric Le Goater, 2021/12/15
- [PULL 078/102] target/ppc: move xscvqpdp to decodetree, Cédric Le Goater, 2021/12/15
- [PULL 082/102] target/ppc: introduce PMUEventType and PMU overflow timers, Cédric Le Goater, 2021/12/15
- [PULL 084/102] target/ppc: PMU: update counters on PMCs r/w, Cédric Le Goater, 2021/12/15
- [PULL 086/102] target/ppc: enable PMU counter overflow with cycle events, Cédric Le Goater, 2021/12/15