[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v11 10/10] arm: tcg: Adhere to SMCCC 1.3 section 5.2
From: |
Peter Maydell |
Subject: |
Re: [PATCH v11 10/10] arm: tcg: Adhere to SMCCC 1.3 section 5.2 |
Date: |
Thu, 16 Sep 2021 13:29:04 +0100 |
On Wed, 15 Sept 2021 at 19:10, Alexander Graf <agraf@csgraf.de> wrote:
>
> The SMCCC 1.3 spec section 5.2 says
>
> The Unknown SMC Function Identifier is a sign-extended value of (-1)
> that is returned in the R0, W0 or X0 registers. An implementation must
> return this error code when it receives:
>
> * An SMC or HVC call with an unknown Function Identifier
> * An SMC or HVC call for a removed Function Identifier
> * An SMC64/HVC64 call from AArch32 state
>
> To comply with these statements, let's always return -1 when we encounter
> an unknown HVC or SMC call.
>
> Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
- [PATCH v11 06/10] hvf: arm: Implement -cpu host, (continued)
- [PATCH v11 06/10] hvf: arm: Implement -cpu host, Alexander Graf, 2021/09/15
- [PATCH v11 09/10] hvf: arm: Add rudimentary PMC support, Alexander Graf, 2021/09/15
- [PATCH v11 08/10] arm: Add Hypervisor.framework build target, Alexander Graf, 2021/09/15
- [PATCH v11 04/10] hvf: Add Apple Silicon support, Alexander Graf, 2021/09/15
- [PATCH v11 07/10] hvf: arm: Implement PSCI handling, Alexander Graf, 2021/09/15
- [PATCH v11 10/10] arm: tcg: Adhere to SMCCC 1.3 section 5.2, Alexander Graf, 2021/09/15
- Re: [PATCH v11 10/10] arm: tcg: Adhere to SMCCC 1.3 section 5.2,
Peter Maydell <=