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[PULL 28/36] target/mips: Restrict CPUMIPSTLBContext::map_address() hand
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 28/36] target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope |
Date: |
Sun, 2 May 2021 18:15:30 +0200 |
The 3 map_address() handlers are local to tlb_helper.c,
no need to have their prototype declared publically.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210428170410.479308-23-f4bug@amsat.org>
---
target/mips/internal.h | 6 ------
target/mips/tcg/sysemu/tlb_helper.c | 13 +++++++------
2 files changed, 7 insertions(+), 12 deletions(-)
diff --git a/target/mips/internal.h b/target/mips/internal.h
index 558cdca4e84..c1751700731 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -152,12 +152,6 @@ struct CPUMIPSTLBContext {
} mmu;
};
-int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
- target_ulong address, MMUAccessType access_type);
-int fixed_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
- target_ulong address, MMUAccessType access_type);
-int r4k_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
- target_ulong address, MMUAccessType access_type);
void r4k_helper_tlbwi(CPUMIPSState *env);
void r4k_helper_tlbwr(CPUMIPSState *env);
void r4k_helper_tlbp(CPUMIPSState *env);
diff --git a/target/mips/tcg/sysemu/tlb_helper.c
b/target/mips/tcg/sysemu/tlb_helper.c
index bf242f5e65a..a45146a2b21 100644
--- a/target/mips/tcg/sysemu/tlb_helper.c
+++ b/target/mips/tcg/sysemu/tlb_helper.c
@@ -26,8 +26,8 @@
#include "hw/mips/cpudevs.h"
/* no MMU emulation */
-int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
- target_ulong address, MMUAccessType access_type)
+static int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
+ target_ulong address, MMUAccessType access_type)
{
*physical = address;
*prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
@@ -35,8 +35,9 @@ int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical,
int *prot,
}
/* fixed mapping MMU emulation */
-int fixed_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
- target_ulong address, MMUAccessType access_type)
+static int fixed_mmu_map_address(CPUMIPSState *env, hwaddr *physical,
+ int *prot, target_ulong address,
+ MMUAccessType access_type)
{
if (address <= (int32_t)0x7FFFFFFFUL) {
if (!(env->CP0_Status & (1 << CP0St_ERL))) {
@@ -55,8 +56,8 @@ int fixed_mmu_map_address(CPUMIPSState *env, hwaddr
*physical, int *prot,
}
/* MIPS32/MIPS64 R4000-style MMU emulation */
-int r4k_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
- target_ulong address, MMUAccessType access_type)
+static int r4k_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
+ target_ulong address, MMUAccessType access_type)
{
uint16_t ASID = env->CP0_EntryHi & env->CP0_EntryHi_ASID_mask;
uint32_t MMID = env->CP0_MemoryMapID;
--
2.26.3
- [PULL 18/36] target/mips: Introduce tcg-internal.h for TCG specific declarations, (continued)
- [PULL 18/36] target/mips: Introduce tcg-internal.h for TCG specific declarations, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 19/36] target/mips: Add simple user-mode mips_cpu_do_interrupt(), Philippe Mathieu-Daudé, 2021/05/02
- [PULL 20/36] target/mips: Add simple user-mode mips_cpu_tlb_fill(), Philippe Mathieu-Daudé, 2021/05/02
- [PULL 21/36] target/mips: Move cpu_signal_handler definition around, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 22/36] target/mips: Move sysemu specific files under sysemu/ subfolder, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 23/36] target/mips: Move physical addressing code to sysemu/physaddr.c, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 24/36] target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCG, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 26/36] target/mips: Restrict mmu_init() to TCG, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 25/36] target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 27/36] target/mips: Move tlb_helper.c to tcg/sysemu/, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 28/36] target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope,
Philippe Mathieu-Daudé <=
- [PULL 29/36] target/mips: Move Special opcodes to tcg/sysemu/special_helper.c, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 30/36] target/mips: Move helper_cache() to tcg/sysemu/special_helper.c, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 31/36] target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 32/36] target/mips: Move exception management code to exception.c, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 33/36] target/mips: Move CP0 helpers to sysemu/cp0.c, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 34/36] target/mips: Move TCG source files under tcg/ sub directory, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 35/36] hw/mips: Restrict non-virtualized machines to TCG, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 36/36] gitlab-ci: Add KVM mips64el cross-build jobs, Philippe Mathieu-Daudé, 2021/05/02
- Re: [PULL 00/36] MIPS patches for 2021-05-02, no-reply, 2021/05/02
- Re: [PULL 00/36] MIPS patches for 2021-05-02, Peter Maydell, 2021/05/04