Re: [RFC PATCH 4/8] qtest/fuzz: Restrict CPU I/O instructions

[Philippe Mathieu-Daudé]

On 3/15/21 6:14 AM, Thomas Huth wrote:
> On 15/03/2021 00.29, Philippe Mathieu-Daudé wrote:
>> Restrict CPU I/O instructions to architectures providing
>> I/O bus.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>>   tests/qtest/fuzz/generic_fuzz.c   | 16 ++++++++++------
>>   tests/qtest/fuzz/qtest_wrappers.c |  4 ++++
>>   2 files changed, 14 insertions(+), 6 deletions(-)
>>
>> diff --git a/tests/qtest/fuzz/generic_fuzz.c
>> b/tests/qtest/fuzz/generic_fuzz.c
>> index ee8c17a04c4..3e0089f4a63 100644
>> --- a/tests/qtest/fuzz/generic_fuzz.c
>> +++ b/tests/qtest/fuzz/generic_fuzz.c
>> @@ -304,6 +304,13 @@ static bool get_io_address(address_range *result,
>> AddressSpace *as,
>>       return cb_info.found;
>>   }
>>   +static bool get_mmio_address(address_range *result,
>> +                             uint8_t index, uint32_t offset)
>> +{
>> +    return get_io_address(result, &address_space_memory, index, offset);
>> +}
>> +
>> +#ifdef TARGET_HAS_IOPORT
> 
> Sorry, but the qtests are generic code, I don't think we should
> introduce target specific ifdefs here...?
My view is if you want to generically access an I/O bus, you need
to do it via its address space, not the CPU architecture-specific
interface.

I.e., if an I/O bus is exposed by the PCI function of a south bridge,
if you use the correct PCI AS view you can run your test on any
architecture providing a PCI bus, not only X86.

So yes you are right, and the current code is abusing it. Yes it is
fixable but is it worthwhile? Apparently nobody cared, so probably
not worthwhile. Let's disregard this series for now.

Regards,

Phil.