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[PULL v2 17/19] hw/riscv: virt: Drop the 'link_up' parameter of gpex_pci
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From: |
Alistair Francis |
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Subject: |
[PULL v2 17/19] hw/riscv: virt: Drop the 'link_up' parameter of gpex_pcie_init() |
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Date: |
Thu, 4 Mar 2021 09:46:49 -0500 |
From: Bin Meng <bin.meng@windriver.com>
`link_up` is never used in gpex_pcie_init(). Drop it.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210220144807.819-3-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/riscv/virt.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index cfd52bc59b..1d05bb3ef9 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -449,7 +449,7 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion
*sys_mem,
hwaddr ecam_base, hwaddr ecam_size,
hwaddr mmio_base, hwaddr mmio_size,
hwaddr pio_base,
- DeviceState *plic, bool link_up)
+ DeviceState *plic)
{
DeviceState *dev;
MemoryRegion *ecam_alias, *ecam_reg;
@@ -669,12 +669,12 @@ static void virt_machine_init(MachineState *machine)
}
gpex_pcie_init(system_memory,
- memmap[VIRT_PCIE_ECAM].base,
- memmap[VIRT_PCIE_ECAM].size,
- memmap[VIRT_PCIE_MMIO].base,
- memmap[VIRT_PCIE_MMIO].size,
- memmap[VIRT_PCIE_PIO].base,
- DEVICE(pcie_plic), true);
+ memmap[VIRT_PCIE_ECAM].base,
+ memmap[VIRT_PCIE_ECAM].size,
+ memmap[VIRT_PCIE_MMIO].base,
+ memmap[VIRT_PCIE_MMIO].size,
+ memmap[VIRT_PCIE_PIO].base,
+ DEVICE(pcie_plic));
serial_mm_init(system_memory, memmap[VIRT_UART0].base,
0, qdev_get_gpio_in(DEVICE(mmio_plic), UART0_IRQ), 399193,
--
2.30.1
- [PULL v2 07/19] hw/ssi: Add SiFive SPI controller support, (continued)
- [PULL v2 07/19] hw/ssi: Add SiFive SPI controller support, Alistair Francis, 2021/03/04
- [PULL v2 09/19] hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card, Alistair Francis, 2021/03/04
- [PULL v2 08/19] hw/riscv: sifive_u: Add QSPI0 controller and connect a flash, Alistair Francis, 2021/03/04
- [PULL v2 10/19] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value, Alistair Francis, 2021/03/04
- [PULL v2 12/19] docs/system: Add RISC-V documentation, Alistair Francis, 2021/03/04
- [PULL v2 13/19] docs/system: riscv: Add documentation for sifive_u machine, Alistair Francis, 2021/03/04
- [PULL v2 11/19] docs/system: Sort targets in alphabetical order, Alistair Francis, 2021/03/04
- [PULL v2 14/19] goldfish_rtc: re-arm the alarm after migration, Alistair Francis, 2021/03/04
- [PULL v2 16/19] hw/riscv: Drop 'struct MemmapEntry', Alistair Francis, 2021/03/04
- [PULL v2 15/19] MAINTAINERS: Add a SiFive machine section, Alistair Francis, 2021/03/04
- [PULL v2 17/19] hw/riscv: virt: Drop the 'link_up' parameter of gpex_pcie_init(),
Alistair Francis <=
- [PULL v2 18/19] hw/riscv: virt: Limit RAM size in a 32-bit system, Alistair Francis, 2021/03/04
- [PULL v2 19/19] hw/riscv: virt: Map high mmio for PCIe, Alistair Francis, 2021/03/04
- Re: [PULL v2 00/19] riscv-to-apply queue, Peter Maydell, 2021/03/05