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[RFC PATCH v2 0/4] target/mips: Make the number of TLB entries a CPU pro
From: |
Philippe Mathieu-Daudé |
Subject: |
[RFC PATCH v2 0/4] target/mips: Make the number of TLB entries a CPU property |
Date: |
Fri, 16 Oct 2020 00:47:42 +0200 |
Yocto developers have expressed interest in running MIPS32
CPU with preset number of TLB:
https://lists.gnu.org/archive/html/qemu-devel/2020-10/msg03428.html
Help them by allowing to set the TLB entries from a preset array
of valid hardware values.
Please test/review,
Phil.
Philippe Mathieu-Daudé (4):
target/mips: Make cpu_mips_realize_env() propagate Error
target/mips: Store number of TLB entries in CPUMIPSState
target/mips: Make the number of TLB entries a CPU property
target/mips: Allow using the 34Kf with 16/32/64 preset TLB entries
target/mips/cpu.h | 1 +
target/mips/internal.h | 11 ++++++++-
target/mips/cpu.c | 12 ++++++++--
target/mips/translate.c | 39 ++++++++++++++++++++++++++++++--
target/mips/translate_init.c.inc | 3 ++-
5 files changed, 60 insertions(+), 6 deletions(-)
--
2.26.2
- [RFC PATCH v2 0/4] target/mips: Make the number of TLB entries a CPU property,
Philippe Mathieu-Daudé <=