[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 5/9] i386/kvm: Remove IRQ routing support checks
From: |
Eduardo Habkost |
Subject: |
[PULL 5/9] i386/kvm: Remove IRQ routing support checks |
Date: |
Thu, 15 Oct 2020 12:44:57 -0400 |
KVM_CAP_IRQ_ROUTING is always available on x86, so replace checks
for kvm_has_gsi_routing() and KVM_CAP_IRQ_ROUTING with asserts.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200922201922.2153598-3-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
hw/i386/kvm/apic.c | 5 ++---
hw/i386/kvm/ioapic.c | 33 ++++++++++++++++-----------------
target/i386/kvm.c | 7 -------
3 files changed, 18 insertions(+), 27 deletions(-)
diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c
index 4eb2d77b87..dd29906061 100644
--- a/hw/i386/kvm/apic.c
+++ b/hw/i386/kvm/apic.c
@@ -225,9 +225,8 @@ static void kvm_apic_realize(DeviceState *dev, Error **errp)
memory_region_init_io(&s->io_memory, OBJECT(s), &kvm_apic_io_ops, s,
"kvm-apic-msi", APIC_SPACE_SIZE);
- if (kvm_has_gsi_routing()) {
- msi_nonbroken = true;
- }
+ assert(kvm_has_gsi_routing());
+ msi_nonbroken = true;
}
static void kvm_apic_unrealize(DeviceState *dev)
diff --git a/hw/i386/kvm/ioapic.c b/hw/i386/kvm/ioapic.c
index c5528df942..dfc3c98005 100644
--- a/hw/i386/kvm/ioapic.c
+++ b/hw/i386/kvm/ioapic.c
@@ -25,27 +25,26 @@ void kvm_pc_setup_irq_routing(bool pci_enabled)
KVMState *s = kvm_state;
int i;
- if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
- for (i = 0; i < 8; ++i) {
- if (i == 2) {
- continue;
- }
- kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i);
- }
- for (i = 8; i < 16; ++i) {
- kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
+ assert(kvm_has_gsi_routing());
+ for (i = 0; i < 8; ++i) {
+ if (i == 2) {
+ continue;
}
- if (pci_enabled) {
- for (i = 0; i < 24; ++i) {
- if (i == 0) {
- kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2);
- } else if (i != 2) {
- kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i);
- }
+ kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i);
+ }
+ for (i = 8; i < 16; ++i) {
+ kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
+ }
+ if (pci_enabled) {
+ for (i = 0; i < 24; ++i) {
+ if (i == 0) {
+ kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2);
+ } else if (i != 2) {
+ kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i);
}
}
- kvm_irqchip_commit_routes(s);
}
+ kvm_irqchip_commit_routes(s);
}
typedef struct KVMIOAPICState KVMIOAPICState;
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 69c691ad77..588d893a63 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -4552,13 +4552,6 @@ bool kvm_arch_stop_on_emulation_error(CPUState *cs)
void kvm_arch_init_irq_routing(KVMState *s)
{
- if (!kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
- /* If kernel can't do irq routing, interrupt source
- * override 0->2 cannot be set up as required by HPET.
- * So we have to disable it.
- */
- no_hpet = 1;
- }
/* We know at this point that we're using the in-kernel
* irqchip, so we can use irqfds, and on x86 we know
* we can use msi via irqfd and GSI routing.
--
2.28.0
- [PULL 0/9] x86 queue, 2020-10-15, Eduardo Habkost, 2020/10/15
- [PULL 1/9] i386: drop x86_cpu_get_supported_feature_word() forward declaration, Eduardo Habkost, 2020/10/15
- [PULL 8/9] cpu: Introduce CPU model deprecation API, Eduardo Habkost, 2020/10/15
- [PULL 3/9] target/i386: Remove core_id assert check in CPUID 0x8000001E, Eduardo Habkost, 2020/10/15
- [PULL 2/9] i386/kvm: fix FEATURE_HYPERV_EDX value in hyperv_passthrough case, Eduardo Habkost, 2020/10/15
- [PULL 4/9] i386/kvm: Require KVM_CAP_IRQ_ROUTING, Eduardo Habkost, 2020/10/15
- [PULL 5/9] i386/kvm: Remove IRQ routing support checks,
Eduardo Habkost <=
- [PULL 6/9] i386/kvm: Delete kvm_allows_irq0_override(), Eduardo Habkost, 2020/10/15
- [PULL 7/9] kvm: Correct documentation of kvm_irqchip_*(), Eduardo Habkost, 2020/10/15
- [PULL 9/9] i386: Mark Icelake-Client CPU models deprecated, Eduardo Habkost, 2020/10/15
- Re: [PULL 0/9] x86 queue, 2020-10-15, Peter Maydell, 2020/10/17