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[PATCH v4 19/21] hw/mips/malta: Set CPU frequency to 320 MHz
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v4 19/21] hw/mips/malta: Set CPU frequency to 320 MHz |
Date: |
Mon, 12 Oct 2020 11:58:02 +0200 |
The CoreLV card with ID 0x420's CPU clocked at 320 MHz. Create
a 'cpuclk' output clock and connect it to the CPU input clock.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/mips/malta.c | 19 ++++++++++++++++---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 4019c9dc1a8..1e2b750719e 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -26,6 +26,7 @@
#include "qemu/units.h"
#include "qemu-common.h"
#include "cpu.h"
+#include "hw/clock.h"
#include "hw/southbridge/piix.h"
#include "hw/isa/superio.h"
#include "hw/char/serial.h"
@@ -57,6 +58,7 @@
#include "sysemu/kvm.h"
#include "hw/semihosting/semihost.h"
#include "hw/mips/cps.h"
+#include "hw/qdev-clock.h"
#define ENVP_ADDR 0x80002000l
#define ENVP_NB_ENTRIES 16
@@ -94,6 +96,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(MaltaState, MIPS_MALTA)
struct MaltaState {
SysBusDevice parent_obj;
+ Clock *cpuclk;
MIPSCPSState cps;
qemu_irq i8259[ISA_NUM_IRQS];
};
@@ -1159,7 +1162,7 @@ static void main_cpu_reset(void *opaque)
}
}
-static void create_cpu_without_cps(MachineState *ms,
+static void create_cpu_without_cps(MachineState *ms, MaltaState *s,
qemu_irq *cbus_irq, qemu_irq *i8259_irq)
{
CPUMIPSState *env;
@@ -1167,7 +1170,7 @@ static void create_cpu_without_cps(MachineState *ms,
int i;
for (i = 0; i < ms->smp.cpus; i++) {
- cpu = MIPS_CPU(cpu_create(ms->cpu_type));
+ cpu = mips_cpu_create_with_clock(ms->cpu_type, s->cpuclk);
/* Init internal devices */
cpu_mips_irq_init_cpu(cpu);
@@ -1189,6 +1192,7 @@ static void create_cps(MachineState *ms, MaltaState *s,
&error_fatal);
object_property_set_int(OBJECT(&s->cps), "num-vp", ms->smp.cpus,
&error_fatal);
+ qdev_connect_clock_in(DEVICE(&s->cps), "clk-in", s->cpuclk);
sysbus_realize(SYS_BUS_DEVICE(&s->cps), &error_fatal);
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1);
@@ -1203,7 +1207,7 @@ static void mips_create_cpu(MachineState *ms, MaltaState
*s,
if ((ms->smp.cpus > 1) && cpu_supports_cps_smp(ms->cpu_type)) {
create_cps(ms, s, cbus_irq, i8259_irq);
} else {
- create_cpu_without_cps(ms, cbus_irq, i8259_irq);
+ create_cpu_without_cps(ms, s, cbus_irq, i8259_irq);
}
}
@@ -1421,10 +1425,19 @@ void mips_malta_init(MachineState *machine)
pci_vga_init(pci_bus);
}
+static void mips_malta_instance_init(Object *obj)
+{
+ MaltaState *s = MIPS_MALTA(obj);
+
+ s->cpuclk = qdev_init_clock_out(DEVICE(obj), "cpu-refclk");
+ clock_set_hz(s->cpuclk, 320000000); /* 320 MHz */
+}
+
static const TypeInfo mips_malta_device = {
.name = TYPE_MIPS_MALTA,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(MaltaState),
+ .instance_init = mips_malta_instance_init,
};
static void mips_malta_machine_init(MachineClass *mc)
--
2.26.2
- [PATCH v4 09/21] target/mips/cpu: Calculate the CP0 timer period using the CPU frequency, (continued)
- [PATCH v4 09/21] target/mips/cpu: Calculate the CP0 timer period using the CPU frequency, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 10/21] target/mips/cpu: Make cp0_count_rate a property, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 11/21] target/mips/cpu: Allow the CPU to use dynamic frequencies, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 12/21] target/mips/cpu: Introduce mips_cpu_create_with_clock() helper, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 13/21] hw/mips/r4k: Explicit CPU frequency is 200 MHz, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 14/21] hw/mips/fuloong2e: Set CPU frequency to 533 MHz, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 15/21] hw/mips/mipssim: Correct CPU frequency, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 16/21] hw/mips/jazz: Correct CPU frequencies, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 17/21] hw/mips/cps: Expose input clock and connect it to CPU cores, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 18/21] hw/mips/boston: Set CPU frequency to 1 GHz, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 19/21] hw/mips/malta: Set CPU frequency to 320 MHz,
Philippe Mathieu-Daudé <=
- [PATCH v4 20/21] hw/mips/cps: Do not allow use without input clock, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 21/21] target/mips/cpu: Display warning when CPU is used without input clock, Philippe Mathieu-Daudé, 2020/10/12
- Re: [PATCH v4 00/21] hw/mips: Set CPU frequency, Philippe Mathieu-Daudé, 2020/10/16