[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v4 18/21] hw/mips/boston: Set CPU frequency to 1 GHz
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v4 18/21] hw/mips/boston: Set CPU frequency to 1 GHz |
Date: |
Mon, 12 Oct 2020 11:58:01 +0200 |
The I6400 can run at 1 GHz or more. Create a 'cpuclk'
output clock and connect it to the CPU input clock.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/mips/boston.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index 1b3f69e949c..cf2296f4488 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -30,6 +30,7 @@
#include "hw/mips/cps.h"
#include "hw/mips/cpudevs.h"
#include "hw/pci-host/xilinx-pcie.h"
+#include "hw/qdev-clock.h"
#include "hw/qdev-properties.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
@@ -54,6 +55,7 @@ struct BostonState {
MachineState *mach;
MIPSCPSState cps;
SerialMM *uart;
+ Clock *cpuclk;
CharBackend lcd_display;
char lcd_content[8];
@@ -251,10 +253,19 @@ static const MemoryRegionOps boston_platreg_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
+static void mips_boston_instance_init(Object *obj)
+{
+ BostonState *s = BOSTON(obj);
+
+ s->cpuclk = qdev_init_clock_out(DEVICE(obj), "cpu-refclk");
+ clock_set_hz(s->cpuclk, 1000000000); /* 1 GHz */
+}
+
static const TypeInfo boston_device = {
.name = TYPE_MIPS_BOSTON,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(BostonState),
+ .instance_init = mips_boston_instance_init,
};
static void boston_register_types(void)
@@ -462,6 +473,8 @@ static void boston_mach_init(MachineState *machine)
&error_fatal);
object_property_set_int(OBJECT(&s->cps), "num-vp", machine->smp.cpus,
&error_fatal);
+ qdev_connect_clock_in(DEVICE(&s->cps), "clk-in",
+ qdev_get_clock_out(dev, "cpu-refclk"));
sysbus_realize(SYS_BUS_DEVICE(&s->cps), &error_fatal);
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1);
--
2.26.2
- [PATCH v4 08/21] target/mips: Move cp0_count_ns to CPUMIPSState, (continued)
- [PATCH v4 08/21] target/mips: Move cp0_count_ns to CPUMIPSState, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 09/21] target/mips/cpu: Calculate the CP0 timer period using the CPU frequency, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 10/21] target/mips/cpu: Make cp0_count_rate a property, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 11/21] target/mips/cpu: Allow the CPU to use dynamic frequencies, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 12/21] target/mips/cpu: Introduce mips_cpu_create_with_clock() helper, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 13/21] hw/mips/r4k: Explicit CPU frequency is 200 MHz, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 14/21] hw/mips/fuloong2e: Set CPU frequency to 533 MHz, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 15/21] hw/mips/mipssim: Correct CPU frequency, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 16/21] hw/mips/jazz: Correct CPU frequencies, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 17/21] hw/mips/cps: Expose input clock and connect it to CPU cores, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 18/21] hw/mips/boston: Set CPU frequency to 1 GHz,
Philippe Mathieu-Daudé <=
- [PATCH v4 19/21] hw/mips/malta: Set CPU frequency to 320 MHz, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 20/21] hw/mips/cps: Do not allow use without input clock, Philippe Mathieu-Daudé, 2020/10/12
- [PATCH v4 21/21] target/mips/cpu: Display warning when CPU is used without input clock, Philippe Mathieu-Daudé, 2020/10/12
- Re: [PATCH v4 00/21] hw/mips: Set CPU frequency, Philippe Mathieu-Daudé, 2020/10/16