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[PULL 51/76] target/microblaze: Cache mem_index in DisasContext
From: |
Richard Henderson |
Subject: |
[PULL 51/76] target/microblaze: Cache mem_index in DisasContext |
Date: |
Mon, 31 Aug 2020 09:05:36 -0700 |
Ideally, nothing outside the top-level of translation even
has access to env. Cache the value in init_disas_context.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/microblaze/translate.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 1f6731e0af..a55e110171 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -73,6 +73,7 @@ typedef struct DisasContext {
unsigned int delayed_branch;
unsigned int tb_flags, synced_flags; /* tb dependent flags. */
unsigned int clear_imm;
+ int mem_index;
#define JMP_NOJMP 0
#define JMP_DIRECT 1
@@ -175,8 +176,7 @@ static bool trap_illegal(DisasContext *dc, bool cond)
*/
static bool trap_userspace(DisasContext *dc, bool cond)
{
- int mem_index = cpu_mmu_index(&dc->cpu->env, false);
- bool cond_user = cond && mem_index == MMU_USER_IDX;
+ bool cond_user = cond && dc->mem_index == MMU_USER_IDX;
if (cond_user && (dc->tb_flags & MSR_EE)) {
gen_raise_hw_excp(dc, ESR_EC_PRIVINSN);
@@ -968,7 +968,7 @@ static void dec_load(DisasContext *dc)
TCGv addr;
unsigned int size;
bool rev = false, ex = false, ea = false;
- int mem_index = cpu_mmu_index(&dc->cpu->env, false);
+ int mem_index = dc->mem_index;
MemOp mop;
mop = dc->opcode & 3;
@@ -1077,7 +1077,7 @@ static void dec_store(DisasContext *dc)
TCGLabel *swx_skip = NULL;
unsigned int size;
bool rev = false, ex = false, ea = false;
- int mem_index = cpu_mmu_index(&dc->cpu->env, false);
+ int mem_index = dc->mem_index;
MemOp mop;
mop = dc->opcode & 3;
@@ -1540,6 +1540,7 @@ static void mb_tr_init_disas_context(DisasContextBase
*dcb, CPUState *cs)
dc->ext_imm = dc->base.tb->cs_base;
dc->r0 = NULL;
dc->r0_set = false;
+ dc->mem_index = cpu_mmu_index(&cpu->env, false);
bound = -(dc->base.pc_first | TARGET_PAGE_MASK) / 4;
dc->base.max_insns = MIN(dc->base.max_insns, bound);
--
2.25.1
- [PULL 40/76] target/microblaze: Convert dec_and, dec_or, dec_xor to decodetree, (continued)
- [PULL 40/76] target/microblaze: Convert dec_and, dec_or, dec_xor to decodetree, Richard Henderson, 2020/08/31
- [PULL 41/76] target/microblaze: Convert dec_mul to decodetree, Richard Henderson, 2020/08/31
- [PULL 42/76] target/microblaze: Convert dec_div to decodetree, Richard Henderson, 2020/08/31
- [PULL 43/76] target/microblaze: Unwind properly when raising divide-by-zero, Richard Henderson, 2020/08/31
- [PULL 44/76] target/microblaze: Convert dec_bit to decodetree, Richard Henderson, 2020/08/31
- [PULL 45/76] target/microblaze: Convert dec_barrel to decodetree, Richard Henderson, 2020/08/31
- [PULL 46/76] target/microblaze: Convert dec_imm to decodetree, Richard Henderson, 2020/08/31
- [PULL 47/76] target/microblaze: Convert dec_fpu to decodetree, Richard Henderson, 2020/08/31
- [PULL 48/76] target/microblaze: Fix cpu unwind for fpu exceptions, Richard Henderson, 2020/08/31
- [PULL 49/76] target/microblaze: Mark fpu helpers TCG_CALL_NO_WG, Richard Henderson, 2020/08/31
- [PULL 51/76] target/microblaze: Cache mem_index in DisasContext,
Richard Henderson <=
- [PULL 50/76] target/microblaze: Replace MSR_EE_FLAG with MSR_EE, Richard Henderson, 2020/08/31
- [PULL 52/76] target/microblaze: Fix cpu unwind for stackprot, Richard Henderson, 2020/08/31
- [PULL 54/76] target/microblaze: Assert no overlap in flags making up tb_flags, Richard Henderson, 2020/08/31
- [PULL 53/76] target/microblaze: Convert dec_load and dec_store to decodetree, Richard Henderson, 2020/08/31
- [PULL 55/76] target/microblaze: Move bimm to BIMM_FLAG, Richard Henderson, 2020/08/31
- [PULL 56/76] target/microblaze: Fix no-op mb_cpu_transaction_failed, Richard Henderson, 2020/08/31
- [PULL 57/76] target/microblaze: Store "current" iflags in insn_start, Richard Henderson, 2020/08/31
- [PULL 58/76] tcg: Add tcg_get_insn_start_param, Richard Henderson, 2020/08/31
- [PULL 59/76] target/microblaze: Use cc->do_unaligned_access, Richard Henderson, 2020/08/31
- [PULL 60/76] target/microblaze: Replace clear_imm with tb_flags_to_set, Richard Henderson, 2020/08/31