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[PULL 41/76] target/microblaze: Convert dec_mul to decodetree
From: |
Richard Henderson |
Subject: |
[PULL 41/76] target/microblaze: Convert dec_mul to decodetree |
Date: |
Mon, 31 Aug 2020 09:05:26 -0700 |
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/microblaze/insns.decode | 6 +++
target/microblaze/translate.c | 77 ++++++++++++++--------------------
2 files changed, 37 insertions(+), 46 deletions(-)
diff --git a/target/microblaze/insns.decode b/target/microblaze/insns.decode
index 93bd51c78b..1a2e22e44a 100644
--- a/target/microblaze/insns.decode
+++ b/target/microblaze/insns.decode
@@ -50,6 +50,12 @@ andni 101011 ..... ..... ................
@typeb
cmp 000101 ..... ..... ..... 000 0000 0001 @typea
cmpu 000101 ..... ..... ..... 000 0000 0011 @typea
+mul 010000 ..... ..... ..... 000 0000 0000 @typea
+mulh 010000 ..... ..... ..... 000 0000 0001 @typea
+mulhu 010000 ..... ..... ..... 000 0000 0011 @typea
+mulhsu 010000 ..... ..... ..... 000 0000 0010 @typea
+muli 011000 ..... ..... ................ @typeb
+
or 100000 ..... ..... ..... 000 0000 0000 @typea
ori 101000 ..... ..... ................ @typeb
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index a143f17e9d..617e208583 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -287,6 +287,10 @@ static bool do_typeb_val(DisasContext *dc, arg_typeb *arg,
bool side_effects,
static bool trans_##NAME(DisasContext *dc, arg_typeb *a) \
{ return do_typeb_imm(dc, a, SE, FNI); }
+#define DO_TYPEBI_CFG(NAME, CFG, SE, FNI) \
+ static bool trans_##NAME(DisasContext *dc, arg_typeb *a) \
+ { return dc->cpu->cfg.CFG && do_typeb_imm(dc, a, SE, FNI); }
+
#define DO_TYPEBV(NAME, SE, FN) \
static bool trans_##NAME(DisasContext *dc, arg_typeb *a) \
{ return do_typeb_val(dc, a, SE, FN); }
@@ -364,6 +368,33 @@ static void gen_cmpu(TCGv_i32 out, TCGv_i32 ina, TCGv_i32
inb)
DO_TYPEA(cmp, false, gen_cmp)
DO_TYPEA(cmpu, false, gen_cmpu)
+static void gen_mulh(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
+{
+ TCGv_i32 tmp = tcg_temp_new_i32();
+ tcg_gen_muls2_i32(tmp, out, ina, inb);
+ tcg_temp_free_i32(tmp);
+}
+
+static void gen_mulhu(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
+{
+ TCGv_i32 tmp = tcg_temp_new_i32();
+ tcg_gen_mulu2_i32(tmp, out, ina, inb);
+ tcg_temp_free_i32(tmp);
+}
+
+static void gen_mulhsu(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
+{
+ TCGv_i32 tmp = tcg_temp_new_i32();
+ tcg_gen_mulsu2_i32(tmp, out, ina, inb);
+ tcg_temp_free_i32(tmp);
+}
+
+DO_TYPEA_CFG(mul, use_hw_mul, false, tcg_gen_mul_i32)
+DO_TYPEA_CFG(mulh, use_hw_mul >= 2, false, gen_mulh)
+DO_TYPEA_CFG(mulhu, use_hw_mul >= 2, false, gen_mulhu)
+DO_TYPEA_CFG(mulhsu, use_hw_mul >= 2, false, gen_mulhsu)
+DO_TYPEBI_CFG(muli, use_hw_mul, false, tcg_gen_muli_i32)
+
DO_TYPEA(or, false, tcg_gen_or_i32)
DO_TYPEBI(ori, false, tcg_gen_ori_i32)
@@ -652,51 +683,6 @@ static void dec_msr(DisasContext *dc)
}
}
-/* Multiplier unit. */
-static void dec_mul(DisasContext *dc)
-{
- TCGv_i32 tmp;
- unsigned int subcode;
-
- if (trap_illegal(dc, !dc->cpu->cfg.use_hw_mul)) {
- return;
- }
-
- subcode = dc->imm & 3;
-
- if (dc->type_b) {
- tcg_gen_mul_i32(cpu_R[dc->rd], cpu_R[dc->ra], *(dec_alu_op_b(dc)));
- return;
- }
-
- /* mulh, mulhsu and mulhu are not available if C_USE_HW_MUL is < 2. */
- if (subcode >= 1 && subcode <= 3 && dc->cpu->cfg.use_hw_mul < 2) {
- /* nop??? */
- }
-
- tmp = tcg_temp_new_i32();
- switch (subcode) {
- case 0:
- tcg_gen_mul_i32(cpu_R[dc->rd], cpu_R[dc->ra], cpu_R[dc->rb]);
- break;
- case 1:
- tcg_gen_muls2_i32(tmp, cpu_R[dc->rd],
- cpu_R[dc->ra], cpu_R[dc->rb]);
- break;
- case 2:
- tcg_gen_mulsu2_i32(tmp, cpu_R[dc->rd],
- cpu_R[dc->ra], cpu_R[dc->rb]);
- break;
- case 3:
- tcg_gen_mulu2_i32(tmp, cpu_R[dc->rd], cpu_R[dc->ra],
cpu_R[dc->rb]);
- break;
- default:
- cpu_abort(CPU(dc->cpu), "unknown MUL insn %x\n", subcode);
- break;
- }
- tcg_temp_free_i32(tmp);
-}
-
/* Div unit. */
static void dec_div(DisasContext *dc)
{
@@ -1579,7 +1565,6 @@ static struct decoder_info {
{DEC_BCC, dec_bcc},
{DEC_RTS, dec_rts},
{DEC_FPU, dec_fpu},
- {DEC_MUL, dec_mul},
{DEC_DIV, dec_div},
{DEC_MSR, dec_msr},
{DEC_STREAM, dec_stream},
--
2.25.1
- [PULL 31/76] target/microblaze: Remove DISAS_GNU, (continued)
- [PULL 31/76] target/microblaze: Remove DISAS_GNU, Richard Henderson, 2020/08/31
- [PULL 32/76] target/microblaze: Remove empty D macros, Richard Henderson, 2020/08/31
- [PULL 33/76] target/microblaze: Remove LOG_DIS, Richard Henderson, 2020/08/31
- [PULL 34/76] target/microblaze: Ensure imm constant is always available, Richard Henderson, 2020/08/31
- [PULL 35/76] target/microblaze: Add decodetree infrastructure, Richard Henderson, 2020/08/31
- [PULL 36/76] target/microblaze: Convert dec_add to decodetree, Richard Henderson, 2020/08/31
- [PULL 37/76] target/microblaze: Convert dec_sub to decodetree, Richard Henderson, 2020/08/31
- [PULL 38/76] target/microblaze: Implement cmp and cmpu inline, Richard Henderson, 2020/08/31
- [PULL 39/76] target/microblaze: Convert dec_pattern to decodetree, Richard Henderson, 2020/08/31
- [PULL 40/76] target/microblaze: Convert dec_and, dec_or, dec_xor to decodetree, Richard Henderson, 2020/08/31
- [PULL 41/76] target/microblaze: Convert dec_mul to decodetree,
Richard Henderson <=
- [PULL 42/76] target/microblaze: Convert dec_div to decodetree, Richard Henderson, 2020/08/31
- [PULL 43/76] target/microblaze: Unwind properly when raising divide-by-zero, Richard Henderson, 2020/08/31
- [PULL 44/76] target/microblaze: Convert dec_bit to decodetree, Richard Henderson, 2020/08/31
- [PULL 45/76] target/microblaze: Convert dec_barrel to decodetree, Richard Henderson, 2020/08/31
- [PULL 46/76] target/microblaze: Convert dec_imm to decodetree, Richard Henderson, 2020/08/31
- [PULL 47/76] target/microblaze: Convert dec_fpu to decodetree, Richard Henderson, 2020/08/31
- [PULL 48/76] target/microblaze: Fix cpu unwind for fpu exceptions, Richard Henderson, 2020/08/31
- [PULL 49/76] target/microblaze: Mark fpu helpers TCG_CALL_NO_WG, Richard Henderson, 2020/08/31
- [PULL 51/76] target/microblaze: Cache mem_index in DisasContext, Richard Henderson, 2020/08/31
- [PULL 50/76] target/microblaze: Replace MSR_EE_FLAG with MSR_EE, Richard Henderson, 2020/08/31