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Re: [PATCH 16/20] target/arm: Fix sve_zip_p vs odd vector lengths
From: |
Peter Maydell |
Subject: |
Re: [PATCH 16/20] target/arm: Fix sve_zip_p vs odd vector lengths |
Date: |
Sat, 29 Aug 2020 00:01:16 +0100 |
On Fri, 28 Aug 2020 at 20:26, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 8/25/20 6:49 AM, Peter Maydell wrote:
> > Why is it OK to only check vd==vn etc rather than checking for
> > overlap the way the old code did ? The commit message doesn't
> > mention this.
>
> We only ever pass pred_full_reg_offset, so there will only ever be exact
> overlap. I can either split this out as a separate change or simply add it to
> the patch description.
Whichever you prefer, I guess.
thanks
-- PMM
- [PATCH 00/20] target/arm: SVE2 preparatory patches, Richard Henderson, 2020/08/15
- [PATCH 01/20] qemu/int128: Add int128_lshift, Richard Henderson, 2020/08/15
- [PATCH 20/20] target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimd, Richard Henderson, 2020/08/15
- [PATCH 13/20] target/arm: Tidy SVE tszimm shift formats, Richard Henderson, 2020/08/15
- [PATCH 09/20] target/arm: Merge helper_sve_clr_* and helper_sve_movz_*, Richard Henderson, 2020/08/15
- [PATCH 07/20] target/arm: Use tcg_gen_gvec_bitsel for trans_SEL_pppp, Richard Henderson, 2020/08/15