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[PULL 27/27] target/arm: Use correct FPST for VCMLA, VCADD on fp16
From: |
Peter Maydell |
Subject: |
[PULL 27/27] target/arm: Use correct FPST for VCMLA, VCADD on fp16 |
Date: |
Mon, 24 Aug 2020 10:48:11 +0100 |
When we implemented the VCMLA and VCADD insns we put in the
code to handle fp16, but left it using the standard fp status
flags. Correct them to use FPST_STD_F16 for fp16 operations.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20200806104453.30393-5-peter.maydell@linaro.org
---
target/arm/translate-neon.c.inc | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/arm/translate-neon.c.inc b/target/arm/translate-neon.c.inc
index f8f2cb1869f..9879731a521 100644
--- a/target/arm/translate-neon.c.inc
+++ b/target/arm/translate-neon.c.inc
@@ -181,7 +181,7 @@ static bool trans_VCMLA(DisasContext *s, arg_VCMLA *a)
}
opr_sz = (1 + a->q) * 8;
- fpst = fpstatus_ptr(FPST_STD);
+ fpst = fpstatus_ptr(a->size == 0 ? FPST_STD_F16 : FPST_STD);
fn_gvec_ptr = a->size ? gen_helper_gvec_fcmlas : gen_helper_gvec_fcmlah;
tcg_gen_gvec_3_ptr(vfp_reg_offset(1, a->vd),
vfp_reg_offset(1, a->vn),
@@ -218,7 +218,7 @@ static bool trans_VCADD(DisasContext *s, arg_VCADD *a)
}
opr_sz = (1 + a->q) * 8;
- fpst = fpstatus_ptr(FPST_STD);
+ fpst = fpstatus_ptr(a->size == 0 ? FPST_STD_F16 : FPST_STD);
fn_gvec_ptr = a->size ? gen_helper_gvec_fcadds : gen_helper_gvec_fcaddh;
tcg_gen_gvec_3_ptr(vfp_reg_offset(1, a->vd),
vfp_reg_offset(1, a->vn),
@@ -322,7 +322,7 @@ static bool trans_VCMLA_scalar(DisasContext *s,
arg_VCMLA_scalar *a)
fn_gvec_ptr = (a->size ? gen_helper_gvec_fcmlas_idx
: gen_helper_gvec_fcmlah_idx);
opr_sz = (1 + a->q) * 8;
- fpst = fpstatus_ptr(FPST_STD);
+ fpst = fpstatus_ptr(a->size == 0 ? FPST_STD_F16 : FPST_STD);
tcg_gen_gvec_3_ptr(vfp_reg_offset(1, a->vd),
vfp_reg_offset(1, a->vn),
vfp_reg_offset(1, a->vm),
--
2.20.1
- [PULL 16/27] target/arm: Convert A32 coprocessor insns to decodetree, (continued)
- [PULL 16/27] target/arm: Convert A32 coprocessor insns to decodetree, Peter Maydell, 2020/08/24
- [PULL 17/27] target/arm: Tidy up disas_arm_insn(), Peter Maydell, 2020/08/24
- [PULL 18/27] target/arm: Do M-profile NOCP checks early and via decodetree, Peter Maydell, 2020/08/24
- [PULL 20/27] target/arm: Remove ARCH macro, Peter Maydell, 2020/08/24
- [PULL 19/27] target/arm: Convert T32 coprocessor insns to decodetree, Peter Maydell, 2020/08/24
- [PULL 21/27] target/arm: Delete unused VFP_DREG macros, Peter Maydell, 2020/08/24
- [PULL 22/27] target/arm/translate.c: Delete/amend incorrect comments, Peter Maydell, 2020/08/24
- [PULL 23/27] target/arm: Delete unused ARM_FEATURE_CRC, Peter Maydell, 2020/08/24
- [PULL 25/27] target/arm: Make A32/T32 use new fpstatus_ptr() API, Peter Maydell, 2020/08/24
- [PULL 24/27] target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr(), Peter Maydell, 2020/08/24
- [PULL 27/27] target/arm: Use correct FPST for VCMLA, VCADD on fp16,
Peter Maydell <=
- [PULL 26/27] target/arm: Implement FPST_STD_F16 fpstatus, Peter Maydell, 2020/08/24
- Re: [PULL 00/27] target-arm queue, Peter Maydell, 2020/08/24