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Re: [PATCH] disas/riscv: Fix incorrect disassembly for `imm20` operand.
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH] disas/riscv: Fix incorrect disassembly for `imm20` operand. |
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Date: |
Fri, 10 Jul 2020 11:30:19 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 |
On 7/7/20 8:43 AM, Wei Wu wrote:
> static int32_t operand_imm20(rv_inst inst)
> {
> - return (((int64_t)inst << 32) >> 44) << 12;
> + return ((int64_t)inst << 32) >> 44;
> }
There's no point in casting to int64_t, for one. But it would be better to use
sextract32(inst, 12, 20).
r~