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Re: [PATCH 01/21] softfloat: make NO_SIGNALING_NANS runtime property
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [PATCH 01/21] softfloat: make NO_SIGNALING_NANS runtime property |
Date: |
Wed, 8 Jul 2020 19:41:16 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 |
On 7/7/20 1:47 AM, Max Filippov wrote:
> target/xtensa, the only user of NO_SIGNALING_NANS macro has FPU
> implementations with and without the corresponding property. With
> NO_SIGNALING_NANS being a macro they cannot be a part of the same QEMU
> executable.
> Replace macro with new property in float_status to allow cores with
> different FPU implementations coexist.
>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: "Alex Bennée" <alex.bennee@linaro.org>
> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
> ---
> fpu/softfloat-specialize.inc.c | 228 ++++++++++++++++----------------
> include/fpu/softfloat-helpers.h | 5 +
> include/fpu/softfloat-types.h | 1 +
> 3 files changed, 117 insertions(+), 117 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
- [PATCH 00/21] target/xtensa: implement double precision FPU, Max Filippov, 2020/07/06
- [PATCH 02/21] softfloat: pass float_status pointer to pickNaN, Max Filippov, 2020/07/06
- [PATCH 01/21] softfloat: make NO_SIGNALING_NANS runtime property, Max Filippov, 2020/07/06
- [PATCH 03/21] softfloat: add xtensa specialization for pickNaNMulAdd, Max Filippov, 2020/07/06
- [PATCH 04/21] target/xtensa: add geometry to xtensa_get_regfile_by_name, Max Filippov, 2020/07/06
- [PATCH 06/21] target/xtensa: rename FPU2000 translators and helpers, Max Filippov, 2020/07/06
- [PATCH 07/21] target/xtensa: move FSR/FCR register accessors, Max Filippov, 2020/07/06
- [PATCH 05/21] target/xtensa: support copying registers up to 64 bits wide, Max Filippov, 2020/07/06