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[PULL 51/53] target/i386: Add SERIALIZE cpu feature
From: |
Paolo Bonzini |
Subject: |
[PULL 51/53] target/i386: Add SERIALIZE cpu feature |
Date: |
Mon, 6 Jul 2020 12:41:53 -0400 |
From: Cathy Zhang <cathy.zhang@intel.com>
The availability of the SERIALIZATION instruction is indicated
by the presence of the CPUID feature flag SERIALIZE, which is
defined as CPUID.(EAX=7,ECX=0):ECX[bit 14].
The release spec link is as follows:
https://software.intel.com/content/dam/develop/public/us/en/documents/\
architecture-instruction-set-extensions-programming-reference.pdf
The associated kvm patch link is as follows:
https://lore.kernel.org/patchwork/patch/1268025/
Signed-off-by: Cathy Zhang <cathy.zhang@intel.com>
Message-Id: <1593991036-12183-2-git-send-email-cathy.zhang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/cpu.c | 2 +-
target/i386/cpu.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index be9a0aa76d..fa9353dfba 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -986,7 +986,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
NULL, NULL, "avx512-4vnniw", "avx512-4fmaps",
NULL, NULL, NULL, NULL,
"avx512-vp2intersect", NULL, "md-clear", NULL,
- NULL, NULL, NULL, NULL,
+ NULL, NULL, "serialize", NULL,
NULL, NULL, NULL /* pconfig */, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, "spec-ctrl", "stibp",
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 9284f96896..bd71fe3ef2 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -777,6 +777,8 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3)
/* AVX512 Vector Pair Intersection to a Pair of Mask Registers */
#define CPUID_7_0_EDX_AVX512_VP2INTERSECT (1U << 8)
+/* SERIALIZE instruction */
+#define CPUID_7_0_EDX_SERIALIZE (1U << 14)
/* Speculation Control */
#define CPUID_7_0_EDX_SPEC_CTRL (1U << 26)
/* Single Thread Indirect Branch Predictors */
--
2.26.2
- [PULL 45/53] accel/kvm: Let kvm_check_extension use global KVM state, (continued)
[PULL 36/53] chardev/tcp: fix error message double free error, Paolo Bonzini, 2020/07/06
[PULL 48/53] target/i386/kvm: Simplify get_para_features(), Paolo Bonzini, 2020/07/06
[PULL 44/53] softmmu/vl: Remove the check for colons in -accel parameters, Paolo Bonzini, 2020/07/06
[PULL 52/53] target/i386: Enable TSX Suspend Load Address Tracking feature, Paolo Bonzini, 2020/07/06
[PULL 51/53] target/i386: Add SERIALIZE cpu feature,
Paolo Bonzini <=
[PULL 34/53] iscsi: handle check condition status in retry loop, Paolo Bonzini, 2020/07/06
[PULL 50/53] target/i386/kvm: Simplify kvm_get_supported_[feature]_msrs(), Paolo Bonzini, 2020/07/06
[PULL 42/53] cpu-throttle: new module, extracted from cpus.c, Paolo Bonzini, 2020/07/06
[PULL 43/53] cpu-timers, icount: new modules, Paolo Bonzini, 2020/07/06
[PULL 39/53] cpus: Move CPU code from exec.c to cpus-common.c, Paolo Bonzini, 2020/07/06
Re: [PULL 00/53] Misc patches for QEMU 5.1 soft freeze, no-reply, 2020/07/06
Re: [PULL 00/53] Misc patches for QEMU 5.1 soft freeze, Peter Maydell, 2020/07/07