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Re: [PULL v2 00/64] riscv-to-apply queue
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From: |
Peter Maydell |
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Subject: |
Re: [PULL v2 00/64] riscv-to-apply queue |
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Date: |
Fri, 3 Jul 2020 17:55:05 +0100 |
On Thu, 2 Jul 2020 at 17:33, Alistair Francis <alistair.francis@wdc.com> wrote:
>
> The following changes since commit 64f0ad8ad8e13257e7c912df470d46784b55c3fd:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2020-07-02'
> into staging (2020-07-02 15:54:09 +0100)
>
> are available in the Git repository at:
>
> git@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20200702-1
>
> for you to fetch changes up to 6bf91617f47c74efc99ef48236765d9677c0898e:
>
> target/riscv: configure and turn on vector extension from command line
> (2020-07-02 09:19:34 -0700)
>
> ----------------------------------------------------------------
> This PR contains two patches to improve PLIC support in QEMU.
>
> It also contains one patch that fixes CLINT accesses for RISC-V. This
> fixes a regression for most RISC-V boards.
>
> The rest of the PR is adding support for the v0.7.1 RISC-V vector
> extensions. This is experimental support as the vector extensions are
> still in a draft state.
>
> This is a v2 pull request that has fixed the building on big endian
> machines failure.
>
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
for any user-visible changes.
-- PMM
- [PULL v2 54/64] target/riscv: vmfirst find-first-set mask bit, (continued)
- [PULL v2 54/64] target/riscv: vmfirst find-first-set mask bit, Alistair Francis, 2020/07/02
- [PULL v2 57/64] target/riscv: vector element index instruction, Alistair Francis, 2020/07/02
- [PULL v2 58/64] target/riscv: integer extract instruction, Alistair Francis, 2020/07/02
- [PULL v2 59/64] target/riscv: integer scalar move instruction, Alistair Francis, 2020/07/02
- [PULL v2 60/64] target/riscv: floating-point scalar move instructions, Alistair Francis, 2020/07/02
- [PULL v2 61/64] target/riscv: vector slide instructions, Alistair Francis, 2020/07/02
- [PULL v2 64/64] target/riscv: configure and turn on vector extension from command line, Alistair Francis, 2020/07/02
- [PULL v2 62/64] target/riscv: vector register gather instruction, Alistair Francis, 2020/07/02
- [PULL v2 63/64] target/riscv: vector compress instruction, Alistair Francis, 2020/07/02
- Re: [PULL v2 00/64] riscv-to-apply queue, no-reply, 2020/07/02
- Re: [PULL v2 00/64] riscv-to-apply queue,
Peter Maydell <=