qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[PATCH 2/3] numa: Allow HMAT cache to be defined before HMAT latency/ban


From: Michal Privoznik
Subject: [PATCH 2/3] numa: Allow HMAT cache to be defined before HMAT latency/bandwidth
Date: Fri, 29 May 2020 15:33:47 +0200

Currently, when defining a HMAT cache for a NUMA node (in
parse_numa_hmat_cache()) there is this check that forces users to
define HMAT latency/bandwidth first. There is no real need for
this, because nothing in the parse function relies on that and
the HMAT table is constructed way later - when ACPI table is
constructed.

Signed-off-by: Michal Privoznik <mprivozn@redhat.com>
---
 hw/core/numa.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/hw/core/numa.c b/hw/core/numa.c
index 316bc50d75..338453461c 100644
--- a/hw/core/numa.c
+++ b/hw/core/numa.c
@@ -384,7 +384,6 @@ void parse_numa_hmat_cache(MachineState *ms, 
NumaHmatCacheOptions *node,
                            Error **errp)
 {
     int nb_numa_nodes = ms->numa_state->num_nodes;
-    NodeInfo *numa_info = ms->numa_state->nodes;
     NumaHmatCacheOptions *hmat_cache = NULL;
 
     if (node->node_id >= nb_numa_nodes) {
@@ -393,13 +392,6 @@ void parse_numa_hmat_cache(MachineState *ms, 
NumaHmatCacheOptions *node,
         return;
     }
 
-    if (numa_info[node->node_id].lb_info_provided != (BIT(0) | BIT(1))) {
-        error_setg(errp, "The latency and bandwidth information of "
-                   "node-id=%" PRIu32 " should be provided before memory side "
-                   "cache attributes", node->node_id);
-        return;
-    }
-
     if (node->level < 1 || node->level >= HMAT_LB_LEVELS) {
         error_setg(errp, "Invalid level=%" PRIu8 ", it should be larger than 0 
"
                    "and less than or equal to %d", node->level,
-- 
2.26.2




reply via email to

[Prev in Thread] Current Thread [Next in Thread]