Re: [PATCH] riscv: Fix defination of csr operations

[Alistair Francis]

On Sun, Jan 19, 2020 at 11:55 PM <address@hidden> wrote:
>
> From: Ian Jiang <address@hidden>
>
> There is a mistake in defining CSR operations for pmpcfg registers.
> This patch fixes the bug.
>
> Signed-off-by: Ian Jiang <address@hidden>

Looks good! Thanks for the patch.

Reviewed-by: Alistair Francis <address@hidden>

Alistair

> ---
>  target/riscv/csr.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index da02f9f0b1..e07b5267be 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -948,7 +948,7 @@ static riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
>      [CSR_SATP] =                { smode, read_satp,        write_satp        
> },
>
>      /* Physical Memory Protection */
> -    [CSR_PMPCFG0  ... CSR_PMPADDR9] =  { pmp,   read_pmpcfg,  write_pmpcfg   
> },
> +    [CSR_PMPCFG0  ... CSR_PMPCFG3] =  { pmp,   read_pmpcfg,  write_pmpcfg   
> },
>      [CSR_PMPADDR0 ... CSR_PMPADDR15] = { pmp,   read_pmpaddr, write_pmpaddr  
> },
>
>      /* Performance Counters */
> --
> 2.17.1
>
>