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[PATCH v2 10/10] target/ppc: Only calculate RMLS derived RMA limit on de
From: |
David Gibson |
Subject: |
[PATCH v2 10/10] target/ppc: Only calculate RMLS derived RMA limit on demand |
Date: |
Tue, 7 Jan 2020 15:48:27 +1100 |
When the LPCR is written, we update the env->rmls field with the RMA limit
it implies. Simplify things by just calculating the value directly from
the LPCR value when we need it.
It's possible this is a little slower, but it's unlikely to be significant,
since this is only for real mode accesses in a translation configuration
that's not used very often, and the whole thing is behind the qemu TLB
anyway. Therefore, keeping the number of state variables down and not
having to worry about making sure it's always in sync seems the better
option.
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/cpu.h | 1 -
target/ppc/mmu-hash64.c | 8 +++++---
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 2de9e2fa2b..2a79b97bd8 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1075,7 +1075,6 @@ struct CPUPPCState {
uint64_t insns_flags2;
#if defined(TARGET_PPC64)
ppc_slb_t vrma_slb;
- target_ulong rmls;
#endif
int error_code;
diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c
index e6f24be93e..170a78bd2e 100644
--- a/target/ppc/mmu-hash64.c
+++ b/target/ppc/mmu-hash64.c
@@ -842,8 +842,10 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr
eaddr,
goto skip_slb_search;
} else {
+ target_ulong limit = rmls_limit(cpu);
+
/* Emulated old-style RMO mode, bounds check against RMLS */
- if (raddr >= env->rmls) {
+ if (raddr >= limit) {
if (rwx == 2) {
ppc_hash64_set_isi(cs, SRR1_PROTFAULT);
} else {
@@ -1005,8 +1007,9 @@ hwaddr ppc_hash64_get_phys_page_debug(PowerPCCPU *cpu,
target_ulong addr)
return -1;
}
} else {
+ target_ulong limit = rmls_limit(cpu);
/* Emulated old-style RMO mode, bounds check against RMLS */
- if (raddr >= env->rmls) {
+ if (raddr >= limit) {
return -1;
}
return raddr | env->spr[SPR_RMOR];
@@ -1096,7 +1099,6 @@ void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val)
CPUPPCState *env = &cpu->env;
env->spr[SPR_LPCR] = val & pcc->lpcr_mask;
- env->rmls = rmls_limit(cpu);
ppc_hash64_update_vrma(cpu);
}
--
2.24.1
- Re: [PATCH v2 01/10] ppc: Drop PPC_EMULATE_32BITS_HYPV stub, (continued)
- [PATCH v2 03/10] target/ppc: Correct handling of real mode accesses with vhyp on hash MMU, David Gibson, 2020/01/06
- [PATCH v2 08/10] target/ppc: Streamline calculation of RMA limit from LPCR[RMLS], David Gibson, 2020/01/06
- [PATCH v2 06/10] target/ppc: Remove RMOR register from POWER9 & POWER10, David Gibson, 2020/01/06
- [PATCH v2 04/10] target/ppc: Introduce ppc_hash64_use_vrma() helper, David Gibson, 2020/01/06
- [PATCH v2 10/10] target/ppc: Only calculate RMLS derived RMA limit on demand,
David Gibson <=
- [PATCH v2 09/10] target/ppc: Correct RMLS table, David Gibson, 2020/01/06
- Re: [PATCH v2 09/10] target/ppc: Correct RMLS table, Cédric Le Goater, 2020/01/08
[PATCH v2 05/10] spapr, ppc: Remove VPM0/RMLS hacks for POWER9, David Gibson, 2020/01/06