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[Qemu-devel] [PULL 27/31] target/mips: Clean up handling of CP0 register
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL 27/31] target/mips: Clean up handling of CP0 register 28 |
Date: |
Thu, 29 Aug 2019 12:25:09 +0200 |
From: Aleksandar Markovic <address@hidden>
Clean up handling of CP0 register 28.
Reviewed-by: Aleksandar Rikalo <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Message-Id: <address@hidden>
---
target/mips/cpu.h | 24 +++++++++++--------
target/mips/translate.c | 64 ++++++++++++++++++++++++-------------------------
2 files changed, 46 insertions(+), 42 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 40b7cc6..de9e850 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -233,12 +233,12 @@ typedef struct mips_def_t mips_def_t;
*
* 0 DataLo DataHi ErrorEPC DESAVE
* 1 TagLo TagHi
- * 2 DataLo DataHi KScratch<n>
- * 3 TagLo TagHi KScratch<n>
- * 4 DataLo DataHi KScratch<n>
- * 5 TagLo TagHi KScratch<n>
- * 6 DataLo DataHi KScratch<n>
- * 7 TagLo TagHi KScratch<n>
+ * 2 DataLo1 DataHi KScratch<n>
+ * 3 TagLo1 TagHi KScratch<n>
+ * 4 DataLo2 DataHi KScratch<n>
+ * 5 TagLo2 TagHi KScratch<n>
+ * 6 DataLo3 DataHi KScratch<n>
+ * 7 TagLo3 TagHi KScratch<n>
*
*/
#define CP0_REGISTER_00 0
@@ -427,10 +427,14 @@ typedef struct mips_def_t mips_def_t;
/* CP0 Register 27 */
#define CP0_REG27__CACHERR 0
/* CP0 Register 28 */
-#define CP0_REG28__ITAGLO 0
-#define CP0_REG28__IDATALO 1
-#define CP0_REG28__DTAGLO 2
-#define CP0_REG28__DDATALO 3
+#define CP0_REG28__TAGLO 0
+#define CP0_REG28__DATALO 1
+#define CP0_REG28__TAGLO1 2
+#define CP0_REG28__DATALO1 3
+#define CP0_REG28__TAGLO2 4
+#define CP0_REG28__DATALO2 5
+#define CP0_REG28__TAGLO3 6
+#define CP0_REG28__DATALO3 7
/* CP0 Register 29 */
#define CP0_REG29__IDATAHI 1
#define CP0_REG29__DDATAHI 3
diff --git a/target/mips/translate.c b/target/mips/translate.c
index c969c25..032e3b0 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -7476,10 +7476,10 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_28:
switch (sel) {
- case 0:
- case 2:
- case 4:
- case 6:
+ case CP0_REG28__TAGLO:
+ case CP0_REG28__TAGLO1:
+ case CP0_REG28__TAGLO2:
+ case CP0_REG28__TAGLO3:
{
TCGv_i64 tmp = tcg_temp_new_i64();
tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUMIPSState,
CP0_TagLo));
@@ -7488,10 +7488,10 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
}
register_name = "TagLo";
break;
- case 1:
- case 3:
- case 5:
- case 7:
+ case CP0_REG28__DATALO:
+ case CP0_REG28__DATALO1:
+ case CP0_REG28__DATALO2:
+ case CP0_REG28__DATALO3:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DataLo));
register_name = "DataLo";
break;
@@ -8231,17 +8231,17 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_28:
switch (sel) {
- case 0:
- case 2:
- case 4:
- case 6:
+ case CP0_REG28__TAGLO:
+ case CP0_REG28__TAGLO1:
+ case CP0_REG28__TAGLO2:
+ case CP0_REG28__TAGLO3:
gen_helper_mtc0_taglo(cpu_env, arg);
register_name = "TagLo";
break;
- case 1:
- case 3:
- case 5:
- case 7:
+ case CP0_REG28__DATALO:
+ case CP0_REG28__DATALO1:
+ case CP0_REG28__DATALO2:
+ case CP0_REG28__DATALO3:
gen_helper_mtc0_datalo(cpu_env, arg);
register_name = "DataLo";
break;
@@ -8959,17 +8959,17 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_28:
switch (sel) {
- case 0:
- case 2:
- case 4:
- case 6:
+ case CP0_REG28__TAGLO:
+ case CP0_REG28__TAGLO1:
+ case CP0_REG28__TAGLO2:
+ case CP0_REG28__TAGLO3:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_TagLo));
register_name = "TagLo";
break;
- case 1:
- case 3:
- case 5:
- case 7:
+ case CP0_REG28__DATALO:
+ case CP0_REG28__DATALO1:
+ case CP0_REG28__DATALO2:
+ case CP0_REG28__DATALO3:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DataLo));
register_name = "DataLo";
break;
@@ -9695,17 +9695,17 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_28:
switch (sel) {
- case 0:
- case 2:
- case 4:
- case 6:
+ case CP0_REG28__TAGLO:
+ case CP0_REG28__TAGLO1:
+ case CP0_REG28__TAGLO2:
+ case CP0_REG28__TAGLO3:
gen_helper_mtc0_taglo(cpu_env, arg);
register_name = "TagLo";
break;
- case 1:
- case 3:
- case 5:
- case 7:
+ case CP0_REG28__DATALO:
+ case CP0_REG28__DATALO1:
+ case CP0_REG28__DATALO2:
+ case CP0_REG28__DATALO3:
gen_helper_mtc0_datalo(cpu_env, arg);
register_name = "DataLo";
break;
--
2.7.4
- [Qemu-devel] [PULL 11/31] target/mips: Clean up handling of CP0 register 10, (continued)
- [Qemu-devel] [PULL 11/31] target/mips: Clean up handling of CP0 register 10, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 13/31] target/mips: Clean up handling of CP0 register 12, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 04/31] target/mips: Clean up handling of CP0 register 3, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 16/31] target/mips: Clean up handling of CP0 register 15, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 26/31] target/mips: Clean up handling of CP0 register 27, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 22/31] target/mips: Clean up handling of CP0 register 23, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 25/31] target/mips: Clean up handling of CP0 register 26, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 23/31] target/mips: Clean up handling of CP0 register 24, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 20/31] target/mips: Clean up handling of CP0 register 19, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 14/31] target/mips: Clean up handling of CP0 register 13, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 27/31] target/mips: Clean up handling of CP0 register 28,
Aleksandar Markovic <=
- [Qemu-devel] [PULL 28/31] target/mips: Clean up handling of CP0 register 29, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 19/31] target/mips: Clean up handling of CP0 register 18, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 29/31] target/mips: Clean up handling of CP0 register 30, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 31/31] target/mips: Fix emulation of ST.W in system mode, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 17/31] target/mips: Clean up handling of CP0 register 16, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 21/31] target/mips: Clean up handling of CP0 register 20, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 18/31] target/mips: Clean up handling of CP0 register 17, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 30/31] target/mips: Clean up handling of CP0 register 31, Aleksandar Markovic, 2019/08/29