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[Qemu-devel] [PULL 09/31] target/mips: Clean up handling of CP0 register
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL 09/31] target/mips: Clean up handling of CP0 register 8 |
Date: |
Thu, 29 Aug 2019 12:24:51 +0200 |
From: Aleksandar Markovic <address@hidden>
Clean up handling of CP0 register 8.
Reviewed-by: Aleksandar Rikalo <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Message-Id: <address@hidden>
---
target/mips/cpu.h | 1 +
target/mips/translate.c | 32 ++++++++++++++++----------------
2 files changed, 17 insertions(+), 16 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index a0c6a6f..50a7205 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -333,6 +333,7 @@ typedef struct mips_def_t mips_def_t;
#define CP0_REG08__BADVADDR 0
#define CP0_REG08__BADINSTR 1
#define CP0_REG08__BADINSTRP 2
+#define CP0_REG08__BADINSTRX 3
/* CP0 Register 09 */
#define CP0_REG09__COUNT 0
#define CP0_REG09__SAARI 6
diff --git a/target/mips/translate.c b/target/mips/translate.c
index cf2ba5a..d4faa75 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -7097,22 +7097,22 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_08:
switch (sel) {
- case 0:
+ case CP0_REG08__BADVADDR:
tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_BadVAddr));
tcg_gen_ext32s_tl(arg, arg);
register_name = "BadVAddr";
break;
- case 1:
+ case CP0_REG08__BADINSTR:
CP0_CHECK(ctx->bi);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstr));
register_name = "BadInstr";
break;
- case 2:
+ case CP0_REG08__BADINSTRP:
CP0_CHECK(ctx->bp);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP));
register_name = "BadInstrP";
break;
- case 3:
+ case CP0_REG08__BADINSTRX:
CP0_CHECK(ctx->bi);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX));
tcg_gen_andi_tl(arg, arg, ~0xffff);
@@ -7830,19 +7830,19 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_08:
switch (sel) {
- case 0:
+ case CP0_REG08__BADVADDR:
/* ignored */
register_name = "BadVAddr";
break;
- case 1:
+ case CP0_REG08__BADINSTR:
/* ignored */
register_name = "BadInstr";
break;
- case 2:
+ case CP0_REG08__BADINSTRP:
/* ignored */
register_name = "BadInstrP";
break;
- case 3:
+ case CP0_REG08__BADINSTRX:
/* ignored */
register_name = "BadInstrX";
break;
@@ -8574,21 +8574,21 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_08:
switch (sel) {
- case 0:
+ case CP0_REG08__BADVADDR:
tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_BadVAddr));
register_name = "BadVAddr";
break;
- case 1:
+ case CP0_REG08__BADINSTR:
CP0_CHECK(ctx->bi);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstr));
register_name = "BadInstr";
break;
- case 2:
+ case CP0_REG08__BADINSTRP:
CP0_CHECK(ctx->bp);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP));
register_name = "BadInstrP";
break;
- case 3:
+ case CP0_REG08__BADINSTRX:
CP0_CHECK(ctx->bi);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX));
tcg_gen_andi_tl(arg, arg, ~0xffff);
@@ -9289,19 +9289,19 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_08:
switch (sel) {
- case 0:
+ case CP0_REG08__BADVADDR:
/* ignored */
register_name = "BadVAddr";
break;
- case 1:
+ case CP0_REG08__BADINSTR:
/* ignored */
register_name = "BadInstr";
break;
- case 2:
+ case CP0_REG08__BADINSTRP:
/* ignored */
register_name = "BadInstrP";
break;
- case 3:
+ case CP0_REG08__BADINSTRX:
/* ignored */
register_name = "BadInstrX";
break;
--
2.7.4
- [Qemu-devel] [PULL 02/31] target/mips: Clean up handling of CP0 register 1, (continued)
- [Qemu-devel] [PULL 02/31] target/mips: Clean up handling of CP0 register 1, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 05/31] target/mips: Clean up handling of CP0 register 4, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 08/31] target/mips: Clean up handling of CP0 register 7, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 03/31] target/mips: Clean up handling of CP0 register 2, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 10/31] target/mips: Clean up handling of CP0 register 9, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 15/31] target/mips: Clean up handling of CP0 register 14, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 06/31] target/mips: Clean up handling of CP0 register 5, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 07/31] target/mips: Clean up handling of CP0 register 6, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 24/31] target/mips: Clean up handling of CP0 register 25, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 12/31] target/mips: Clean up handling of CP0 register 11, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 09/31] target/mips: Clean up handling of CP0 register 8,
Aleksandar Markovic <=
- [Qemu-devel] [PULL 11/31] target/mips: Clean up handling of CP0 register 10, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 13/31] target/mips: Clean up handling of CP0 register 12, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 04/31] target/mips: Clean up handling of CP0 register 3, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 16/31] target/mips: Clean up handling of CP0 register 15, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 26/31] target/mips: Clean up handling of CP0 register 27, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 22/31] target/mips: Clean up handling of CP0 register 23, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 25/31] target/mips: Clean up handling of CP0 register 26, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 23/31] target/mips: Clean up handling of CP0 register 24, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 20/31] target/mips: Clean up handling of CP0 register 19, Aleksandar Markovic, 2019/08/29
- [Qemu-devel] [PULL 14/31] target/mips: Clean up handling of CP0 register 13, Aleksandar Markovic, 2019/08/29