[Qemu-devel] [PULL 07/19] ppc: Fix xsmaddmdp and friends

[David Gibson]

From: "Paul A. Clarke" <address@hidden>

A class of instructions of the form:
  op Target,A,B
which operate like:
  Target = Target * A + B
have a bit set which distinguishes them from instructions that operate as:
  Target = Target * B + A

This bit is not being checked properly (using PPC_BIT macro), so all
instructions in this class are operating incorrectly as the second form
above.  The bit was being checked as if it were part of a 64-bit
instruction opcode, rather than a proper 32-bit opcode.  Fix by using the
macro (PPC_BIT32) which treats the opcode as a 32-bit quantity.

Fixes: c9f4e4d8b632 ("target/ppc: improve VSX_FMADD with new 
GEN_VSX_HELPER_VSX_MADD macro")

Signed-off-by: Paul A. Clarke <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Tested-by: Laurent Vivier <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
 target/ppc/translate/vsx-impl.inc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/ppc/translate/vsx-impl.inc.c 
b/target/ppc/translate/vsx-impl.inc.c
index 3922686ad6..8287e272f5 100644
--- a/target/ppc/translate/vsx-impl.inc.c
+++ b/target/ppc/translate/vsx-impl.inc.c
@@ -1308,7 +1308,7 @@ static void gen_##name(DisasContext *ctx)                 
                    \
     }                                                                         \
     xt = gen_vsr_ptr(xT(ctx->opcode));                                        \
     xa = gen_vsr_ptr(xA(ctx->opcode));                                        \
-    if (ctx->opcode & PPC_BIT(25)) {                                          \
+    if (ctx->opcode & PPC_BIT32(25)) {                                        \
         /*                                                                    \
          * AxT + B                                                            \
          */                                                                   \
-- 
2.21.0