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[Qemu-devel] [PATCH v3 55/69] target/arm: Convert T16 adjust sp (immedia
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v3 55/69] target/arm: Convert T16 adjust sp (immediate) |
Date: |
Wed, 28 Aug 2019 12:04:42 -0700 |
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate.c | 15 ++-------------
target/arm/t16.decode | 9 +++++++++
2 files changed, 11 insertions(+), 13 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index cf19f1f777..b7e2c72f35 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -10742,19 +10742,8 @@ static void disas_thumb_insn(DisasContext *s, uint32_t
insn)
/* misc */
op = (insn >> 8) & 0xf;
switch (op) {
- case 0:
- /*
- * 0b1011_0000_xxxx_xxxx
- * - ADD (SP plus immediate)
- * - SUB (SP minus immediate)
- */
- tmp = load_reg(s, 13);
- val = (insn & 0x7f) * 4;
- if (insn & (1 << 7))
- val = -(int32_t)val;
- tcg_gen_addi_i32(tmp, tmp, val);
- store_sp_checked(s, tmp);
- break;
+ case 0: /* add/sub (sp, immediate), in decodetree */
+ goto illegal_op;
case 2: /* sign/zero extend. */
ARCH(6);
diff --git a/target/arm/t16.decode b/target/arm/t16.decode
index 5a570484e3..b425b86795 100644
--- a/target/arm/t16.decode
+++ b/target/arm/t16.decode
@@ -156,6 +156,15 @@ ADD_rrri 0100 0100 . .... ... @addsub_2h
s=0
CMP_xrri 0100 0101 . .... ... @addsub_2h s=1
MOV_rxri 0100 0110 . .... ... @addsub_2h s=0
+# Adjust SP (immediate)
+
+%imm7_0x4 0:7 !function=times_4
+@addsub_sp_i .... .... . ....... \
+ &s_rri_rot s=0 rd=13 rn=13 rot=0 imm=%imm7_0x4
+
+ADD_rri 1011 0000 0 ....... @addsub_sp_i
+SUB_rri 1011 0000 1 ....... @addsub_sp_i
+
# Branch and exchange
@branchr .... .... . rm:4 ... &r
--
2.17.1
- [Qemu-devel] [PATCH v3 38/69] target/arm: Convert PLI, PLD, PLDW, (continued)
- [Qemu-devel] [PATCH v3 38/69] target/arm: Convert PLI, PLD, PLDW, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 34/69] target/arm: Convert RFE and SRS, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 42/69] target/arm: Convert TT, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 44/69] target/arm: Simplify disas_arm_insn, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 47/69] target/arm: Convert T16 load/store (register offset), Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 50/69] target/arm: Convert T16 load/store multiple, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 41/69] target/arm: Convert SG, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 28/69] target/arm: Convert LDM, STM, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 39/69] target/arm: Convert Unallocated memory hint, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 43/69] target/arm: Simplify disas_thumb2_insn, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 55/69] target/arm: Convert T16 adjust sp (immediate),
Richard Henderson <=
- [Qemu-devel] [PATCH v3 49/69] target/arm: Convert T16 add pc/sp (immediate), Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 33/69] target/arm: Convert SVC, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 59/69] target/arm: Convert T16, nop hints, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 63/69] target/arm: Convert T16, Miscellaneous 16-bit instructions, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 35/69] target/arm: Convert Clear-Exclusive, Barriers, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 48/69] target/arm: Convert T16 load/store (immediate offset), Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 68/69] target/arm: Clean up disas_thumb_insn, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 69/69] target/arm: Inline gen_bx_im into callers, Richard Henderson, 2019/08/28
- [Qemu-devel] [PATCH v3 46/69] target/arm: Convert T16 data-processing (two low regs), Richard Henderson, 2019/08/28