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Re: [Qemu-devel] [PATCH v2 34/68] target/arm: Convert Clear-Exclusive, B
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v2 34/68] target/arm: Convert Clear-Exclusive, Barriers |
Date: |
Sun, 25 Aug 2019 16:52:37 +0100 |
On Mon, 19 Aug 2019 at 22:38, Richard Henderson
<address@hidden> wrote:
>
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> target/arm/translate.c | 122 +++++++++++++++--------------------
> target/arm/a32-uncond.decode | 10 +++
> target/arm/t32.decode | 10 +++
> 3 files changed, 73 insertions(+), 69 deletions(-)
>
> diff --git a/target/arm/translate.c b/target/arm/translate.c
> index e268c5168d..6489bbc09c 100644
> --- a/target/arm/translate.c
> +++ b/target/arm/translate.c
> @@ -10038,6 +10038,58 @@ static bool trans_SRS(DisasContext *s, arg_SRS *a)
> return true;
> }
>
> +/*
> + * Clear-Exclusive, Barriers
> + */
> +
> +static bool trans_CLREX(DisasContext *s, arg_CLREX *a)
> +{
> + if (!ENABLE_ARCH_6K) {
> + return false;
> + }
> + gen_clrex(s);
> + return true;
> +}
> +
> +static bool trans_DSB(DisasContext *s, arg_DSB *a)
> +{
> + if (!s->thumb && !ENABLE_ARCH_7) {
> + return false;
> + }
> + tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);
> + return true;
> +}
> +
> +static bool trans_DMB(DisasContext *s, arg_DMB *a)
> +{
> + return trans_DSB(s, NULL);
> +}
> +
> +static bool trans_ISB(DisasContext *s, arg_ISB *a)
> +{
> + /*
> + * We need to break the TB after this insn to execute
> + * self-modifying code correctly and also to take
> + * any pending interrupts immediately.
> + */
> + gen_goto_tb(s, 0, s->base.pc_next);
> + return true;
> +}
The guard conditions on these don't look right for the
Thumb case -- the old Thumb decoder has them exist only if
we have feature V7 or feature M. Are they really equivalent?
> diff --git a/target/arm/t32.decode b/target/arm/t32.decode
> index c8a8aeceee..18c268e712 100644
> --- a/target/arm/t32.decode
> +++ b/target/arm/t32.decode
> @@ -305,6 +305,16 @@ CLZ 1111 1010 1011 ---- 1111 .... 1000 ....
> @rdm
> # of the space is "reserved hint, behaves as nop".
> NOP 1111 0011 1010 1111 1000 0000 ---- ----
> }
> +
> + # Miscelaneous control
"Miscellaneous"
> + {
> + CLREX 1111 0011 1011 1111 1000 1111 0010 1111
> + DSB 1111 0011 1011 1111 1000 1111 0100 ----
> + DMB 1111 0011 1011 1111 1000 1111 0101 ----
> + ISB 1111 0011 1011 1111 1000 1111 0110 ----
> + SB 1111 0011 1011 1111 1000 1111 0111 0000
> + }
Otherwise
Reviewed-by: Peter Maydell <address@hidden>
thanks
-- PMM
- Re: [Qemu-devel] [PATCH v2 35/68] target/arm: Convert CPS (privileged), (continued)
- Re: [Qemu-devel] [PATCH v2 35/68] target/arm: Convert CPS (privileged), Richard Henderson, 2019/08/25
- Re: [Qemu-devel] [PATCH v2 35/68] target/arm: Convert CPS (privileged), Richard Henderson, 2019/08/25
- Re: [Qemu-devel] [PATCH v2 35/68] target/arm: Convert CPS (privileged), Peter Maydell, 2019/08/25
- Re: [Qemu-devel] [PATCH v2 35/68] target/arm: Convert CPS (privileged), Richard Henderson, 2019/08/25
- Re: [Qemu-devel] [PATCH v2 35/68] target/arm: Convert CPS (privileged), Richard Henderson, 2019/08/25
[Qemu-devel] [PATCH v2 36/68] target/arm: Convert SETEND, Richard Henderson, 2019/08/19
[Qemu-devel] [PATCH v2 30/68] target/arm: Diagnose base == pc for LDM/STM, Richard Henderson, 2019/08/19
[Qemu-devel] [PATCH v2 34/68] target/arm: Convert Clear-Exclusive, Barriers, Richard Henderson, 2019/08/19
- Re: [Qemu-devel] [PATCH v2 34/68] target/arm: Convert Clear-Exclusive, Barriers,
Peter Maydell <=
[Qemu-devel] [PATCH v2 37/68] target/arm: Convert PLI, PLD, PLDW, Richard Henderson, 2019/08/19
[Qemu-devel] [PATCH v2 38/68] target/arm: Convert Unallocated memory hint, Richard Henderson, 2019/08/19
[Qemu-devel] [PATCH v2 41/68] target/arm: Convert TT, Richard Henderson, 2019/08/19
[Qemu-devel] [PATCH v2 39/68] target/arm: Convert Table Branch, Richard Henderson, 2019/08/19
[Qemu-devel] [PATCH v2 40/68] target/arm: Convert SG, Richard Henderson, 2019/08/19