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[Qemu-devel] [PATCH v5 11/17] target/arm: Hoist computation of TBFLAG_A3
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v5 11/17] target/arm: Hoist computation of TBFLAG_A32.VFPEN |
Date: |
Tue, 20 Aug 2019 14:07:14 -0700 |
There are 3 conditions that each enable this flag. M-profile always
enables; A-profile with EL1 as AA64 always enables. Both of these
conditions can easily be cached. The final condition relies on the
FPEXC register which we are not prepared to cache.
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/cpu.h | 2 +-
target/arm/helper.c | 14 ++++++++++----
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 5dec4d3b3a..9606222942 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3188,7 +3188,7 @@ FIELD(TBFLAG_A32, XSCALE_CPAR, 4, 2)
* the same thing as the current security state of the processor!
*/
FIELD(TBFLAG_A32, NS, 6, 1)
-FIELD(TBFLAG_A32, VFPEN, 7, 1) /* Not cached. */
+FIELD(TBFLAG_A32, VFPEN, 7, 1) /* Partially cached, minus FPEXC. */
FIELD(TBFLAG_A32, CONDEXEC, 8, 8) /* Not cached. */
FIELD(TBFLAG_A32, SCTLR_B, 16, 1)
/* For M profile only, set if FPCCR.LSPACT is set */
diff --git a/target/arm/helper.c b/target/arm/helper.c
index c01b3027e0..b905d61898 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11050,6 +11050,9 @@ static uint32_t rebuild_hflags_m32(CPUARMState *env,
int fp_el,
{
uint32_t flags = 0;
+ /* v8M always enables the fpu. */
+ flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1);
+
if (arm_v7m_is_handler_mode(env)) {
flags = FIELD_DP32(flags, TBFLAG_A32, HANDLER, 1);
}
@@ -11081,6 +11084,10 @@ static uint32_t rebuild_hflags_a32(CPUARMState *env,
int fp_el,
ARMMMUIdx mmu_idx)
{
uint32_t flags = rebuild_hflags_aprofile(env);
+
+ if (arm_el_is_aa64(env, 1)) {
+ flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1);
+ }
return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags);
}
@@ -11212,14 +11219,13 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
target_ulong *pc,
flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE,
env->vfp.vec_stride);
}
+ if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30)) {
+ flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1);
+ }
}
flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb);
flags = FIELD_DP32(flags, TBFLAG_A32, CONDEXEC, env->condexec_bits);
- if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30)
- || arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) {
- flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1);
- }
pstate_for_ss = env->uncached_cpsr;
}
--
2.17.1
- [Qemu-devel] [PATCH v5 09/17] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state, (continued)
- [Qemu-devel] [PATCH v5 09/17] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state, Richard Henderson, 2019/08/20
- [Qemu-devel] [PATCH v5 04/17] target/arm: Split arm_cpu_data_is_big_endian, Richard Henderson, 2019/08/20
- [Qemu-devel] [PATCH v5 14/17] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state, Richard Henderson, 2019/08/20
- [Qemu-devel] [PATCH v5 12/17] target/arm: Add arm_rebuild_hflags, Richard Henderson, 2019/08/20
- [Qemu-devel] [PATCH v5 13/17] target/arm: Split out arm_mmu_idx_el, Richard Henderson, 2019/08/20
- [Qemu-devel] [PATCH v5 16/17] target/arm: Rebuild hflags at EL changes and MSR writes, Richard Henderson, 2019/08/20
- [Qemu-devel] [PATCH v5 05/17] target/arm: Split out rebuild_hflags_m32, Richard Henderson, 2019/08/20
- [Qemu-devel] [PATCH v5 07/17] target/arm: Split out rebuild_hflags_a32, Richard Henderson, 2019/08/20
- [Qemu-devel] [PATCH v5 08/17] target/arm: Split out rebuild_hflags_aprofile, Richard Henderson, 2019/08/20
- [Qemu-devel] [PATCH v5 10/17] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state, Richard Henderson, 2019/08/20
- [Qemu-devel] [PATCH v5 11/17] target/arm: Hoist computation of TBFLAG_A32.VFPEN,
Richard Henderson <=
- [Qemu-devel] [PATCH v5 15/17] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}), Richard Henderson, 2019/08/20
- [Qemu-devel] [PATCH v5 17/17] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state, Richard Henderson, 2019/08/20
- Re: [Qemu-devel] [PATCH v5 00/17] target/arm: Reduce overhead of cpu_get_tb_cpu_state, Richard Henderson, 2019/08/20