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[Qemu-devel] [PATCH v7 39/42] cpu: TLB_FLAGS_MASK bit to force memory sl
From: |
tony.nguyen |
Subject: |
[Qemu-devel] [PATCH v7 39/42] cpu: TLB_FLAGS_MASK bit to force memory slow path |
Date: |
Fri, 16 Aug 2019 07:39:02 +0000 |
The fast path is taken when TLB_FLAGS_MASK is all zero.
TLB_FORCE_SLOW is simply a TLB_FLAGS_MASK bit to force the slow path,
there are no other side effects.
Signed-off-by: Tony Nguyen <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
include/exec/cpu-all.h | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 536ea58..e496f99 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -331,12 +331,18 @@ CPUArchState *cpu_copy(CPUArchState *env);
#define TLB_MMIO (1 << (TARGET_PAGE_BITS - 3))
/* Set if TLB entry must have MMU lookup repeated for every access */
#define TLB_RECHECK (1 << (TARGET_PAGE_BITS - 4))
+/* Set if TLB entry must take the slow path. */
+#define TLB_FORCE_SLOW (1 << (TARGET_PAGE_BITS - 5))
/* Use this mask to check interception with an alignment mask
* in a TCG backend.
*/
-#define TLB_FLAGS_MASK (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_MMIO \
- | TLB_RECHECK)
+#define TLB_FLAGS_MASK \
+ (TLB_INVALID_MASK \
+ | TLB_NOTDIRTY \
+ | TLB_MMIO \
+ | TLB_RECHECK \
+ | TLB_FORCE_SLOW)
/**
* tlb_hit_page: return true if page aligned @addr is a hit against the
--
1.8.3.1
?
- Re: [Qemu-devel] [PATCH v7 27/42] hw/pci-host: Declare device little or big endian, (continued)
- [Qemu-devel] [PATCH v7 28/42] hw/sd: Declare device little or big endian, tony.nguyen, 2019/08/16
- [Qemu-devel] [PATCH v7 29/42] hw/ssi: Declare device little or big endian, tony.nguyen, 2019/08/16
- [Qemu-devel] [PATCH v7 32/42] exec: Map device_endian onto MemOp, tony.nguyen, 2019/08/16
- [Qemu-devel] [PATCH v7 30/42] hw/timer: Declare device little or big endian, tony.nguyen, 2019/08/16
- [Qemu-devel] [PATCH v7 34/42] exec: Delete device_endian, tony.nguyen, 2019/08/16
- [Qemu-devel] [PATCH v7 31/42] build: Correct non-common common-obj-* to obj-*, tony.nguyen, 2019/08/16
- [Qemu-devel] [PATCH v7 35/42] exec: Delete DEVICE_HOST_ENDIAN, tony.nguyen, 2019/08/16
- [Qemu-devel] [PATCH v7 36/42] memory: Access MemoryRegion with endianness, tony.nguyen, 2019/08/16
- [Qemu-devel] [PATCH v7 39/42] cpu: TLB_FLAGS_MASK bit to force memory slow path,
tony.nguyen <=
- [Qemu-devel] [PATCH v7 38/42] memory: Single byte swap along the I/O path, tony.nguyen, 2019/08/16
- [Qemu-devel] [PATCH v7 40/42] cputlb: Byte swap memory transaction attribute, tony.nguyen, 2019/08/16
- [Qemu-devel] [PATCH v7 41/42] target/sparc: Add TLB entry with attributes, tony.nguyen, 2019/08/16
- [Qemu-devel] [PATCH v7 42/42] target/sparc: sun4u Invert Endian TTE bit, tony.nguyen, 2019/08/16
- [Qemu-devel] [PATCH v7 37/42] cputlb: Replace size and endian operands for MemOp, tony.nguyen, 2019/08/16
- Re: [Qemu-devel] [PATCH v7 00/42] Invert Endian bit in SPARCv9 MMU TTE, Philippe Mathieu-Daudé, 2019/08/16