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Re: [Qemu-devel] [qemu-s390x] [PATCH-for-4.2 v2 2/6] s390x/tcg: Rework M
From: |
Thomas Huth |
Subject: |
Re: [Qemu-devel] [qemu-s390x] [PATCH-for-4.2 v2 2/6] s390x/tcg: Rework MMU selection for instruction fetches |
Date: |
Wed, 14 Aug 2019 19:44:18 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 |
On 8/14/19 9:23 AM, David Hildenbrand wrote:
> Instructions are always fetched from primary address space, except when
> in home address mode. Perform the selection directly in cpu_mmu_index().
>
> get_mem_index() is only used to perform data access, instructions are
> fetched via cpu_lduw_code(), which translates to cpu_mmu_index(env, true).
>
> We don't care about restricting the access permissions of the TLB
> entries anymore, as we no longer enter PRIMARY entries into the
> SECONDARY MMU. Cleanup related code a bit.
>
> Signed-off-by: David Hildenbrand <address@hidden>
> ---
> target/s390x/cpu.h | 7 +++++++
> target/s390x/mmu_helper.c | 38 +++++++++++++++-----------------------
> 2 files changed, 22 insertions(+), 23 deletions(-)
Reviewed-by: Thomas Huth <address@hidden>
[Qemu-devel] [PATCH-for-4.2 v2 2/6] s390x/tcg: Rework MMU selection for instruction fetches, David Hildenbrand, 2019/08/14
[Qemu-devel] [PATCH-for-4.2 v2 4/6] s390x/mmu: Trace the right value if setting/getting the storage key fails, David Hildenbrand, 2019/08/14
[Qemu-devel] [PATCH-for-4.2 v2 5/6] s390x/mmu: Better storage key reference and change bit handling, David Hildenbrand, 2019/08/14
[Qemu-devel] [PATCH-for-4.2 v2 6/6] s390x/mmu: Factor out storage key handling, David Hildenbrand, 2019/08/14
Re: [Qemu-devel] [PATCH-for-4.2 v2 0/6] s390x/mmu: Storage key reference and change bit handling, Cornelia Huck, 2019/08/19