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[Qemu-devel] [PATCH v4 0/3] target/arm: Reduce overhead of cpu_get_tb_cp
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v4 0/3] target/arm: Reduce overhead of cpu_get_tb_cpu_state |
Date: |
Mon, 5 Aug 2019 17:05:03 -0700 |
Version 3 was back in February:
https://lists.gnu.org/archive/html/qemu-devel/2019-02/msg06002.html
Changes since v3:
* Rebase.
* Do not cache XSCALE_CPAR now that it overlaps VECSTRIDE.
* Leave the new v7m bits as uncached. I haven't figured
out all of the ways fpccr is modified.
Changes since v2:
* Do not cache VECLEN, VECSTRIDE, VFPEN.
These variables come from VFP_FPSCR and VFP_FPEXC, not from
system control registers.
* Move HANDLER and STACKCHECK to rebuild_hflags_a32,
instead of building them in rebuild_hflags_common.
Changes since v1:
* Apparently I had started a last-minute API change, and failed to
covert all of the users, and also failed to re-test afterward.
* Retain assertions for --enable-debug-tcg.
r~
Richard Henderson (3):
target/arm: Split out recompute_hflags et al
target/arm: Rebuild hflags at EL changes and MSR writes
target/arm: Rely on hflags correct in cpu_get_tb_cpu_state
target/arm/cpu.h | 35 ++--
target/arm/helper.h | 3 +
target/arm/internals.h | 3 +
linux-user/syscall.c | 1 +
target/arm/cpu.c | 1 +
target/arm/helper-a64.c | 3 +
target/arm/helper.c | 334 ++++++++++++++++++++++---------------
target/arm/machine.c | 1 +
target/arm/op_helper.c | 1 +
target/arm/translate-a64.c | 6 +-
target/arm/translate.c | 14 +-
11 files changed, 254 insertions(+), 148 deletions(-)
--
2.17.1
- [Qemu-devel] [PATCH v4 0/3] target/arm: Reduce overhead of cpu_get_tb_cpu_state,
Richard Henderson <=