Re: [Qemu-devel] [Qemu-riscv] [PATCH 26/28] riscv: hw: Update PLIC device tree

[Jonathan Behrens]

I was a little surprised to see the "riscv,max-priority" element removed,
but there is no mention of it in the kernel documentation
<https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/interrupt-controller/sifive%2Cplic-1.0.0.txt>
so I guess that max-priority=7 is now assumed.

Reviewed-by: Jonathan Behrens <address@hidden>

On Mon, Aug 5, 2019 at 12:10 PM Bin Meng <address@hidden> wrote:

> This removes "reg-names" and "riscv,max-priority" properties of the
> PLIC node from device tree, and updates its compatible string, to
> keep in sync with the Linux kernel device tree.
>
> Signed-off-by: Bin Meng <address@hidden>
> ---
>
>  hw/riscv/sifive_u.c | 4 +---
>  hw/riscv/virt.c     | 4 +---
>  2 files changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index d77b3c3..5ded3a0 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -229,15 +229,13 @@ static void create_fdt(SiFiveUState *s, const struct
> MemmapEntry *memmap,
>          (long)memmap[SIFIVE_U_PLIC].base);
>      qemu_fdt_add_subnode(fdt, nodename);
>      qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells", 1);
> -    qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv,plic0");
> +    qemu_fdt_setprop_string(fdt, nodename, "compatible",
> "sifive,plic-1.0.0");
>      qemu_fdt_setprop(fdt, nodename, "interrupt-controller", NULL, 0);
>      qemu_fdt_setprop(fdt, nodename, "interrupts-extended",
>          cells, s->soc.cpus.num_harts * sizeof(uint32_t) * 4);
>      qemu_fdt_setprop_cells(fdt, nodename, "reg",
>          0x0, memmap[SIFIVE_U_PLIC].base,
>          0x0, memmap[SIFIVE_U_PLIC].size);
> -    qemu_fdt_setprop_string(fdt, nodename, "reg-names", "control");
> -    qemu_fdt_setprop_cell(fdt, nodename, "riscv,max-priority", 7);
>      qemu_fdt_setprop_cell(fdt, nodename, "riscv,ndev", 0x35);
>      qemu_fdt_setprop_cell(fdt, nodename, "phandle", plic_phandle);
>      plic_phandle = qemu_fdt_get_phandle(fdt, nodename);
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index 127f005..f662100 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -237,15 +237,13 @@ static void *create_fdt(RISCVVirtState *s, const
> struct MemmapEntry *memmap,
>                            FDT_PLIC_ADDR_CELLS);
>      qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells",
>                            FDT_PLIC_INT_CELLS);
> -    qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv,plic0");
> +    qemu_fdt_setprop_string(fdt, nodename, "compatible",
> "sifive,plic-1.0.0");
>      qemu_fdt_setprop(fdt, nodename, "interrupt-controller", NULL, 0);
>      qemu_fdt_setprop(fdt, nodename, "interrupts-extended",
>          cells, s->soc.num_harts * sizeof(uint32_t) * 4);
>      qemu_fdt_setprop_cells(fdt, nodename, "reg",
>          0x0, memmap[VIRT_PLIC].base,
>          0x0, memmap[VIRT_PLIC].size);
> -    qemu_fdt_setprop_string(fdt, nodename, "reg-names", "control");
> -    qemu_fdt_setprop_cell(fdt, nodename, "riscv,max-priority", 7);
>      qemu_fdt_setprop_cell(fdt, nodename, "riscv,ndev", VIRTIO_NDEV);
>      qemu_fdt_setprop_cell(fdt, nodename, "phandle", plic_phandle);
>      plic_phandle = qemu_fdt_get_phandle(fdt, nodename);
> --
> 2.7.4
>
>
>