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Re: [Qemu-devel] PCNet-PCI I/O ops byte order
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From: |
Paolo Bonzini |
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Subject: |
Re: [Qemu-devel] PCNet-PCI I/O ops byte order |
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Date: |
Fri, 30 Aug 2013 07:57:28 +0200 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130805 Thunderbird/17.0.8 |
Il 29/08/2013 22:56, Oleksandr Tymoshenko ha scritto:
> Hello,
>
> I'm working on QEMU/mips support for FreeBSD. qemu-system-mipsel works
> just fine but I ran into a problem with qemu-system-mips. There are two
> devices on PCI bus in MALTA machine emulation. ATA IDE controller and
> PCNet NIC: hw/ide/pci.c and hw/net/pcnet-pci.c respectively. Problem is
> I/O ops byte order for these two devices are defined inconsistently.
> It's DEVICE_LITTLE_ENDIAN for bmdma_addr_ioport_ops and
> DEVICE_NATIVE_ENDIAN for pcnet_io_ops. And since byte swapping
> in my case performed by bus driver I can't get consistent behaviour
> for these devices on big-endian system.
>
> I don't have real hardware to run my code on but shouldn't all devices
> on PCI bus treat words as little endian?
>
> Thank you
Yes, you are right. Aurelien Jarno just posted a patch to use
DEVICE_LITTLE_ENDIAN for pcnet_io_ops.
Paolo