Re: [Qemu-devel] [PULL 1/9] Initialize IA32_FEATURE_CONTROL MSR in reset and migration

[Paolo Bonzini]

Il 23/08/2013 12:10, Andreas Färber ha scritto:
> Am 23.08.2013 11:39, schrieb Paolo Bonzini:
>> From: Arthur Chunqi Li <address@hidden>
>>
>> The recent KVM patch adds IA32_FEATURE_CONTROL support. QEMU needs
>> to clear this MSR when reset vCPU and keep the value of it when
>> migration. This patch add this feature.
>>
>> Signed-off-by: Arthur Chunqi Li <address@hidden>
>> Signed-off-by: Gleb Natapov <address@hidden>
>> ---
>>  target-i386/cpu.h     |  2 ++
>>  target-i386/kvm.c     |  4 ++++
>>  target-i386/machine.c | 22 ++++++++++++++++++++++
>>  3 files changed, 28 insertions(+)
>>
>> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
>> index cedefdc..3a52f94 100644
>> --- a/target-i386/cpu.h
>> +++ b/target-i386/cpu.h
>> @@ -301,6 +301,7 @@
>>  #define MSR_IA32_APICBASE_BSP           (1<<8)
>>  #define MSR_IA32_APICBASE_ENABLE        (1<<11)
>>  #define MSR_IA32_APICBASE_BASE          (0xfffff<<12)
>> +#define MSR_IA32_FEATURE_CONTROL        0x0000003a
>>  #define MSR_TSC_ADJUST                  0x0000003b
>>  #define MSR_IA32_TSCDEADLINE            0x6e0
>>  
>> @@ -813,6 +814,7 @@ typedef struct CPUX86State {
>>  
>>      uint64_t mcg_status;
>>      uint64_t msr_ia32_misc_enable;
>> +    uint64_t msr_ia32_feature_control;
>>  
>>      /* exception/interrupt handling */
>>      int error_code;
>> diff --git a/target-i386/kvm.c b/target-i386/kvm.c
>> index 3c9d10a..84ac00a 100644
>> --- a/target-i386/kvm.c
>> +++ b/target-i386/kvm.c
>> @@ -1121,6 +1121,7 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
>>          if (hyperv_vapic_recommended()) {
>>              kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_APIC_ASSIST_PAGE, 0);
>>          }
>> +        kvm_msr_entry_set(&msrs[n++], MSR_IA32_FEATURE_CONTROL, 
>> env->msr_ia32_feature_control);
>>      }
>>      if (env->mcg_cap) {
>>          int i;
>> @@ -1345,6 +1346,7 @@ static int kvm_get_msrs(X86CPU *cpu)
>>      if (has_msr_misc_enable) {
>>          msrs[n++].index = MSR_IA32_MISC_ENABLE;
>>      }
>> +    msrs[n++].index = MSR_IA32_FEATURE_CONTROL;
>>  
>>      if (!env->tsc_valid) {
>>          msrs[n++].index = MSR_IA32_TSC;
>> @@ -1443,6 +1445,8 @@ static int kvm_get_msrs(X86CPU *cpu)
>>          case MSR_IA32_MISC_ENABLE:
>>              env->msr_ia32_misc_enable = msrs[i].data;
>>              break;
>> +        case MSR_IA32_FEATURE_CONTROL:
>> +            env->msr_ia32_feature_control = msrs[i].data;
> 
> Shouldn't this patch be fixed to have the break that is being added in 5/9?

We try not to rebase uq/master unless there are conflicts that Anthony
prefers not to handle.  (I did that once and Gleb scolded me... :)
perhaps I'll be wrong this time too...).

Paolo