>
> Well, it's not that easy. As the other mapping is part of an ordinary BAR,
> you need to setup the device (at least PCI_COMMAND and PCI_BASE_ADDRESS_0)
> so it responds to memory requests, and also enable the bridge.
>
> We could hack it by having a low-priority mapping at 0x80013000, but it
> seems wrong. Maybe the firmware should configure that BAR first? What
> happens on real hardware?
In this message I seem to confess that the address is arbitrary and in
the subsequent messages the overlap with PCI region is also discussed.
http://lists.nongnu.org/archive/html/qemu-devel/2009-01/msg00542.html
Maybe the address of macio should be fixed as Laurent suggested.