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Re: [Qemu-devel] [PATCH 3/4] LSI53C895A: Implement TARGET RESET message
From: |
Ryan Harper |
Subject: |
Re: [Qemu-devel] [PATCH 3/4] LSI53C895A: Implement TARGET RESET message |
Date: |
Mon, 8 Dec 2008 17:49:44 -0600 |
User-agent: |
Mutt/1.5.6+20040907i |
* Paul Brook <address@hidden> [2008-12-08 17:37]:
>
> > Which I figured was because lsi_soft_reset doesn't initialize
> > current_dma_len. I added current_dma_len to soft_reset and now we can
> > probe with out failing, and existing partitions on the device show up,
> > but any further use of the device results in broken behavior.
> >...
> > Because the driver is issueing bus resets, we're clobbering the scratch
> > registers.
>
> In that case I'm still very suspicious of your parch. Why are you clearing
> some of the scratch registers? It sounds like you need to separate a bus
> reset from a hard reset.
Well, what linux calls bus reset is what is currently wired up to
lsi_soft_reset:
if (val & LSI_ISTAT0_SRST) {
lsi_soft_reset(s);
}
That's the only caller of lsi_soft_reset() besides device init. I am
digging deep trying to find out why linux does a bus reset. It happens
after handling a REPORT LUNS command, which if I'm reading scsi-disk.c
right, we return just LUN0 in the list. Linux then walks the results of
the REPORT LUNS command sending inquiry commands to each one.
Since I don't have this pinned down as well as I thought I did, I'd
appreciate any comments on the first 2 patches. The last two patches
are to address a rather uncommon mode of the linux driver so, if the
first two patches are acceptable, I'd like to see those go in.
--
Ryan Harper
Software Engineer; Linux Technology Center
IBM Corp., Austin, Tx
address@hidden
[Qemu-devel] [PATCH 2/4] Add 64-bit Block Move support (Direct & Table Indirect), Ryan Harper, 2008/12/08
[Qemu-devel] [PATCH 4/4] LSI53C895A: Don't reset scratch C-R on soft reset, Ryan Harper, 2008/12/08
[Qemu-devel] [PATCH 1/4] LSI53C895A: Rename dmbs register to dbms, Ryan Harper, 2008/12/08