[Qemu-commits] [qemu/qemu] 1ee1bd: target/microblaze: Add the opcode-0x0-illegal CPU ...

[Peter Maydell]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 1ee1bd28fcce858e6f51d2d1d6ef9048bc254b86
      
https://github.com/qemu/qemu/commit/1ee1bd28fcce858e6f51d2d1d6ef9048bc254b86
  Author: Edgar E. Iglesias <address@hidden>
  Date:   2020-04-30 (Thu, 30 Apr 2020)

  Changed paths:
    M target/microblaze/cpu.c
    M target/microblaze/cpu.h
    M target/microblaze/translate.c

  Log Message:
  -----------
  target/microblaze: Add the opcode-0x0-illegal CPU property

Add the opcode-0x0-illegal CPU property to control if the core
should trap opcode zero as illegal.

Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Luc Michel <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>


  Commit: 5143fdf36f78bd4c11c4bacedfdbd44365aa5781
      
https://github.com/qemu/qemu/commit/5143fdf36f78bd4c11c4bacedfdbd44365aa5781
  Author: Edgar E. Iglesias <address@hidden>
  Date:   2020-04-30 (Thu, 30 Apr 2020)

  Changed paths:
    M target/microblaze/cpu.c
    M target/microblaze/cpu.h
    M target/microblaze/translate.c

  Log Message:
  -----------
  target/microblaze: Add the ill-opcode-exception property

Add the ill-opcode-exception property to control if illegal
instructions will raise exceptions.

Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Luc Michel <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>


  Commit: 622cc7305cdfe2402950d21bc2160a76646bf259
      
https://github.com/qemu/qemu/commit/622cc7305cdfe2402950d21bc2160a76646bf259
  Author: Edgar E. Iglesias <address@hidden>
  Date:   2020-04-30 (Thu, 30 Apr 2020)

  Changed paths:
    M target/microblaze/cpu.c
    M target/microblaze/cpu.h
    M target/microblaze/op_helper.c

  Log Message:
  -----------
  target/microblaze: Add the div-zero-exception property

Add the div-zero-exception property to control if the core
traps divizions by zero.

Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Luc Michel <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>


  Commit: 1507e5f62e047fb78700f3e14c988d16a3a52ead
      
https://github.com/qemu/qemu/commit/1507e5f62e047fb78700f3e14c988d16a3a52ead
  Author: Edgar E. Iglesias <address@hidden>
  Date:   2020-04-30 (Thu, 30 Apr 2020)

  Changed paths:
    M target/microblaze/cpu.c
    M target/microblaze/cpu.h
    M target/microblaze/translate.c

  Log Message:
  -----------
  target/microblaze: Add the unaligned-exceptions property

Add the unaligned-exceptions property to control if the core
traps unaligned memory accesses.

Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Luc Michel <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>


  Commit: c97673258c1f7e54260842cd0b01d24e82dd6220
      
https://github.com/qemu/qemu/commit/c97673258c1f7e54260842cd0b01d24e82dd6220
  Author: Edgar E. Iglesias <address@hidden>
  Date:   2020-04-30 (Thu, 30 Apr 2020)

  Changed paths:
    M target/microblaze/cpu.c
    M target/microblaze/cpu.h

  Log Message:
  -----------
  target/microblaze: Add the pvr-user1 property

Add the pvr-user1 property to control the user-defined
PVR0 User1 field.

Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Luc Michel <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>


  Commit: 3ed43b5031ed2d7ef501bb81b87caed960218461
      
https://github.com/qemu/qemu/commit/3ed43b5031ed2d7ef501bb81b87caed960218461
  Author: Edgar E. Iglesias <address@hidden>
  Date:   2020-04-30 (Thu, 30 Apr 2020)

  Changed paths:
    M target/microblaze/cpu.c
    M target/microblaze/cpu.h

  Log Message:
  -----------
  target/microblaze: Add the pvr-user2 property

Add the pvr-user2 property to control the user-defined
PVR1 User2 register.

Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Luc Michel <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>


  Commit: 27c94566379069fb8930bb1433dcffbf7df3203d
      
https://github.com/qemu/qemu/commit/27c94566379069fb8930bb1433dcffbf7df3203d
  Author: Peter Maydell <address@hidden>
  Date:   2020-04-30 (Thu, 30 Apr 2020)

  Changed paths:
    M target/microblaze/cpu.c
    M target/microblaze/cpu.h
    M target/microblaze/op_helper.c
    M target/microblaze/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 
'remotes/edgar/tags/edgar/xilinx-next-2020-04-30.for-upstream' into staging

For upstream

# gpg: Signature made Thu 30 Apr 2020 11:14:13 BST
# gpg:                using RSA key AC44FEDC14F7F1EBEDBF415129C596780F6BCA83
# gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <address@hidden>" 
[unknown]
# gpg:                 aka "Edgar E. Iglesias <address@hidden>" [full]
# Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF  4151 29C5 9678 0F6B CA83

* remotes/edgar/tags/edgar/xilinx-next-2020-04-30.for-upstream:
  target/microblaze: Add the pvr-user2 property
  target/microblaze: Add the pvr-user1 property
  target/microblaze: Add the unaligned-exceptions property
  target/microblaze: Add the div-zero-exception property
  target/microblaze: Add the ill-opcode-exception property
  target/microblaze: Add the opcode-0x0-illegal CPU property

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/126eeee6c7b5...27c945663790