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[Qemu-commits] [qemu/qemu] 53d284: cputlb: Move tlb_lock to CPUTLBCommon

From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 53d284: cputlb: Move tlb_lock to CPUTLBCommon
Date: Thu, 01 Nov 2018 09:32:29 -0700 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 53d284554cfb476a43807fe94fa59909ed5d9ff8
      
https://github.com/qemu/qemu/commit/53d284554cfb476a43807fe94fa59909ed5d9ff8
  Author: Richard Henderson <address@hidden>
  Date:   2018-10-31 (Wed, 31 Oct 2018)

  Changed paths:
    M accel/tcg/cputlb.c
    M include/exec/cpu-defs.h

  Log Message:
  -----------
  cputlb: Move tlb_lock to CPUTLBCommon

This is the first of several moves to reduce the size of the
CPU_COMMON_TLB macro and improve some locality of refernce.

Tested-by: Emilio G. Cota <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 8ab102667e4c700082e2e923905e0b443518795c
      
https://github.com/qemu/qemu/commit/8ab102667e4c700082e2e923905e0b443518795c
  Author: Richard Henderson <address@hidden>
  Date:   2018-10-31 (Wed, 31 Oct 2018)

  Changed paths:
    M accel/tcg/cputlb.c

  Log Message:
  -----------
  cputlb: Remove tcg_enabled hack from tlb_flush_nocheck

The bugs this was working around were fixed with commits
022d6378c7fd  target/unicore32: remove tlb_flush from uc32_init_fn
6e11beecfde0  target/alpha: remove tlb_flush from alpha_cpu_initfn

Tested-by: Emilio G. Cota <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 60a2ad7d86e7379e6669806bedaa6cfdf4f2c2f4
      
https://github.com/qemu/qemu/commit/60a2ad7d86e7379e6669806bedaa6cfdf4f2c2f4
  Author: Richard Henderson <address@hidden>
  Date:   2018-10-31 (Wed, 31 Oct 2018)

  Changed paths:
    M accel/tcg/cputlb.c
    M include/exec/cpu-defs.h
    M include/qom/cpu.h

  Log Message:
  -----------
  cputlb: Move cpu->pending_tlb_flush to env->tlb_c.pending_flush

Protect it with the tlb_lock instead of using atomics.
The move puts it in or near the same cacheline as the lock;
using the lock means we don't need a second atomic operation
in order to perform the update.  Which makes it cheap to also
update pending_flush in tlb_flush_by_mmuidx_async_work.

Tested-by: Emilio G. Cota <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 1308e0267174daaf557dac8366ea2ba615d3337f
      
https://github.com/qemu/qemu/commit/1308e0267174daaf557dac8366ea2ba615d3337f
  Author: Richard Henderson <address@hidden>
  Date:   2018-10-31 (Wed, 31 Oct 2018)

  Changed paths:
    M accel/tcg/cputlb.c
    M include/exec/cpu-defs.h

  Log Message:
  -----------
  cputlb: Split large page tracking per mmu_idx

The set of large pages in the kernel is probably not the same
as the set of large pages in the application.  Forcing one
range to cover both will flush more often than necessary.

This allows tlb_flush_page_async_work to flush just the one
mmu_idx implicated, which in turn allows us to remove
tlb_check_page_and_flush_by_mmuidx_async_work.

Tested-by: Emilio G. Cota <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: d5363e5849c245a4880edbd0cdbc29c73694fac0
      
https://github.com/qemu/qemu/commit/d5363e5849c245a4880edbd0cdbc29c73694fac0
  Author: Richard Henderson <address@hidden>
  Date:   2018-10-31 (Wed, 31 Oct 2018)

  Changed paths:
    M accel/tcg/cputlb.c
    M include/exec/cpu-defs.h

  Log Message:
  -----------
  cputlb: Move env->vtlb_index to env->tlb_d.vindex

The rest of the tlb victim cache is per-tlb,
the next use index should be as well.

Tested-by: Emilio G. Cota <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 64f2674bbc695345786b4adbb0feae4f08591f9d
      
https://github.com/qemu/qemu/commit/64f2674bbc695345786b4adbb0feae4f08591f9d
  Author: Richard Henderson <address@hidden>
  Date:   2018-10-31 (Wed, 31 Oct 2018)

  Changed paths:
    M accel/tcg/cputlb.c

  Log Message:
  -----------
  cputlb: Merge tlb_flush_nocheck into tlb_flush_by_mmuidx_async_work

The difference between the two sets of APIs is now miniscule.

This allows tlb_flush, tlb_flush_all_cpus, and tlb_flush_all_cpus_synced
to be merged with their corresponding by_mmuidx functions as well.  For
accounting, consider mmu_idx_bitmask = ALL_MMUIDX_BITS to be a full flush.

Tested-by: Emilio G. Cota <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: f8144c6c1e7574a8f2da05709a81bfc8b9215d77
      
https://github.com/qemu/qemu/commit/f8144c6c1e7574a8f2da05709a81bfc8b9215d77
  Author: Richard Henderson <address@hidden>
  Date:   2018-10-31 (Wed, 31 Oct 2018)

  Changed paths:
    M accel/tcg/cputlb.c

  Log Message:
  -----------
  cputlb: Merge tlb_flush_page into tlb_flush_page_by_mmuidx

The difference between the two sets of APIs is now miniscule.

Tested-by: Emilio G. Cota <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: e09de0a20d42e5e76e91ffc7f9f4787e225e1ec2
      
https://github.com/qemu/qemu/commit/e09de0a20d42e5e76e91ffc7f9f4787e225e1ec2
  Author: Richard Henderson <address@hidden>
  Date:   2018-10-31 (Wed, 31 Oct 2018)

  Changed paths:
    M accel/tcg/cputlb.c
    M accel/tcg/translate-all.c
    M include/exec/cpu-defs.h
    M include/exec/cputlb.h

  Log Message:
  -----------
  cputlb: Count "partial" and "elided" tlb flushes

Our only statistic so far was "full" tlb flushes, where all mmu_idx
are flushed at the same time.

Now count "partial" tlb flushes where sets of mmu_idx are flushed,
but the set is not maximal.  Account one per mmu_idx flushed, as
that is the unit of work performed.

We don't actually count elided flushes yet, but go ahead and change
the interface presented to the monitor all at once.

Tested-by: Emilio G. Cota <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 3d1523ced6060cdfe9e768a814d064067ccabfe5
      
https://github.com/qemu/qemu/commit/3d1523ced6060cdfe9e768a814d064067ccabfe5
  Author: Richard Henderson <address@hidden>
  Date:   2018-10-31 (Wed, 31 Oct 2018)

  Changed paths:
    M accel/tcg/cputlb.c
    M include/exec/cpu-defs.h

  Log Message:
  -----------
  cputlb: Filter flushes on already clean tlbs

Especially for guests with large numbers of tlbs, like ARM or PPC,
we may well not use all of them in between flush operations.
Remember which tlbs have been used since the last flush, and
avoid any useless flushing.

Tested-by: Emilio G. Cota <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: ab6511053015b9cc636915e2c2b97305cbf044f0
      
https://github.com/qemu/qemu/commit/ab6511053015b9cc636915e2c2b97305cbf044f0
  Author: Richard Henderson <address@hidden>
  Date:   2018-10-31 (Wed, 31 Oct 2018)

  Changed paths:
    M accel/tcg/cputlb.c
    M include/exec/cpu-defs.h

  Log Message:
  -----------
  cputlb: Remove tlb_c.pending_flushes

This is essentially redundant with tlb_c.dirty.

Tested-by: Emilio G. Cota <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 60126df95f142c3d5cf0d11cd5d17f1bf9589743
      
https://github.com/qemu/qemu/commit/60126df95f142c3d5cf0d11cd5d17f1bf9589743
  Author: Peter Maydell <address@hidden>
  Date:   2018-11-01 (Thu, 01 Nov 2018)

  Changed paths:
    M accel/tcg/cputlb.c
    M accel/tcg/translate-all.c
    M include/exec/cpu-defs.h
    M include/exec/cputlb.h
    M include/qom/cpu.h

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20181031' into staging

Track mmu_idx for which the TLB is clean and need not be flushed again.

# gpg: Signature made Wed 31 Oct 2018 12:19:31 GMT
# gpg:                using RSA key 64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <address@hidden>"
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20181031:
  cputlb: Remove tlb_c.pending_flushes
  cputlb: Filter flushes on already clean tlbs
  cputlb: Count "partial" and "elided" tlb flushes
  cputlb: Merge tlb_flush_page into tlb_flush_page_by_mmuidx
  cputlb: Merge tlb_flush_nocheck into tlb_flush_by_mmuidx_async_work
  cputlb: Move env->vtlb_index to env->tlb_d.vindex
  cputlb: Split large page tracking per mmu_idx
  cputlb: Move cpu->pending_tlb_flush to env->tlb_c.pending_flush
  cputlb: Remove tcg_enabled hack from tlb_flush_nocheck
  cputlb: Move tlb_lock to CPUTLBCommon

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/9fc22e42cc90...60126df95f14
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