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[Qemu-commits] [qemu/qemu] 7f6bdc: target-sh4: add flags markups for FP
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[Qemu-commits] [qemu/qemu] 7f6bdc: target-sh4: add flags markups for FP helpers |
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Mon, 14 Sep 2015 06:30:06 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 7f6bdc431a5c567fca0130d79c8b14f531a0eb14
https://github.com/qemu/qemu/commit/7f6bdc431a5c567fca0130d79c8b14f531a0eb14
Author: Aurelien Jarno <address@hidden>
Date: 2015-09-13 (Sun, 13 Sep 2015)
Changed paths:
M target-sh4/helper.h
Log Message:
-----------
target-sh4: add flags markups for FP helpers
Most floating point helpers can trigger an exception, but don't change
the globals. Mark these helpers as TCG_CALL_NO_WG.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 218fd7301f88df440da3e16b9cfca000cd2fe111
https://github.com/qemu/qemu/commit/218fd7301f88df440da3e16b9cfca000cd2fe111
Author: Aurelien Jarno <address@hidden>
Date: 2015-09-13 (Sun, 13 Sep 2015)
Changed paths:
M target-sh4/translate.c
Log Message:
-----------
target-sh4: use deposit in swap.b instruction
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: eb6ca2b4a69325e95526bc0f2897791df04e44dc
https://github.com/qemu/qemu/commit/eb6ca2b4a69325e95526bc0f2897791df04e44dc
Author: Aurelien Jarno <address@hidden>
Date: 2015-09-13 (Sun, 13 Sep 2015)
Changed paths:
M target-sh4/translate.c
Log Message:
-----------
target-sh4: improve cmp/str instruction
Instead of testing bytes one by one, we can use the following trick
from https://graphics.stanford.edu/~seander/bithacks.html:
haszero(v) = (v - 0x01010101) & ~v & 0x80808080
The subexpression v - 0x01010101, evaluates to a high bit set in any
byte whenever the corresponding byte in v is zero or greater than 0x80.
The sub-expression ~v & 0x80808080 evaluates to high bits set in bytes
where the byte of v doesn't have its high bit set (so the byte was less
than 0x80). Finally, by ANDing these two sub-expressions the result is
the high bits set where the bytes in v were zero, since the high bits
set due to a value greater than 0x80 in the first sub-expression are
masked off by the second.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 577601616dea10db10a716de1be448f8564076f4
https://github.com/qemu/qemu/commit/577601616dea10db10a716de1be448f8564076f4
Author: Aurelien Jarno <address@hidden>
Date: 2015-09-13 (Sun, 13 Sep 2015)
Changed paths:
M target-sh4/translate.c
Log Message:
-----------
target-sh4: improve shld instruction
The SH4 shld instruction can shift in both direction, depending on the
sign of the shift. This is currently implemented using branches, which
is not really efficient and prevents the optimizer to do its job. In
practice it is often used with a constant loaded in a register just
before.
Simplify the implementation by computing both the value shifted to the
left and to the right, and then selecting the correct one with a
movcond. As with a negative value the shift amount can go up to 32 which
is undefined, we shift the value in two steps.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: be654c83608eaba199ed45444debf2dd46a88fe6
https://github.com/qemu/qemu/commit/be654c83608eaba199ed45444debf2dd46a88fe6
Author: Aurelien Jarno <address@hidden>
Date: 2015-09-13 (Sun, 13 Sep 2015)
Changed paths:
M target-sh4/translate.c
Log Message:
-----------
target-sh4: improve shad instruction
The SH4 shad instruction can shift in both direction, depending on the
sign of the shift. This is currently implemented using branches, which
is not really efficient and prevents the optimizer to do its job. In
practice it is often used with a constant loaded in a register just
before.
Simplify the implementation by computing both the value shifted to the
left and to the right, and then selecting the correct one with a
movcond. As with a negative value the shift amount can go up to 32 which
is undefined, we shift the value in two steps.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: cdd14a8cf25c34ff8d0777530e8d16565f6bf7a1
https://github.com/qemu/qemu/commit/cdd14a8cf25c34ff8d0777530e8d16565f6bf7a1
Author: Guenter Roeck <address@hidden>
Date: 2015-09-13 (Sun, 13 Sep 2015)
Changed paths:
M hw/sh4/r2d.c
Log Message:
-----------
sh4: Fix initramfs initialization for endiannes-mismatched targets
If host and target endianness does not match, loding an initramfs does not work.
Fix by writing boot parameters with appropriate endianness conversion.
Signed-off-by: Guenter Roeck <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 2b750d9d261bda7f75b39dfc1e1e5f22502929d5
https://github.com/qemu/qemu/commit/2b750d9d261bda7f75b39dfc1e1e5f22502929d5
Author: Peter Maydell <address@hidden>
Date: 2015-09-14 (Mon, 14 Sep 2015)
Changed paths:
M hw/sh4/r2d.c
M target-sh4/helper.h
M target-sh4/translate.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/aurel/tags/pull-sh4-next-20150913' into
staging
sh4-next:
- TCG optimizations
- fix initramfs endianness issue
# gpg: Signature made Sun 13 Sep 2015 22:16:12 BST using RSA key ID 1DDD8C9B
# gpg: Good signature from "Aurelien Jarno <address@hidden>"
# gpg: aka "Aurelien Jarno <address@hidden>"
# gpg: aka "Aurelien Jarno <address@hidden>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7746 2642 A9EF 94FD 0F77 196D BA9C 7806 1DDD 8C9B
* remotes/aurel/tags/pull-sh4-next-20150913:
sh4: Fix initramfs initialization for endiannes-mismatched targets
target-sh4: improve shad instruction
target-sh4: improve shld instruction
target-sh4: improve cmp/str instruction
target-sh4: use deposit in swap.b instruction
target-sh4: add flags markups for FP helpers
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/8f6e82e4ecec...2b750d9d261b
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