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[Qemu-commits] [qemu/qemu] e9ebb2: ahci: Do not ignore memory access rea


From: GitHub
Subject: [Qemu-commits] [qemu/qemu] e9ebb2: ahci: Do not ignore memory access read size
Date: Sun, 05 Jul 2015 14:30:04 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: e9ebb2f76778d19227476e34c3d7aa6b8975c1b6
      
https://github.com/qemu/qemu/commit/e9ebb2f76778d19227476e34c3d7aa6b8975c1b6
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c

  Log Message:
  -----------
  ahci: Do not ignore memory access read size

The only guidance the AHCI specification gives on memory access is:
"Register accesses shall have a maximum size of 64-bits; 64-bit access
must not cross an 8-byte alignment boundary."

I interpret this to mean that aligned or unaligned 1, 2 and 4 byte
accesses should work, as well as aligned 8 byte accesses.

In practice, a real Q35/ICH9 responds to 1, 2, 4 and 8 byte reads
regardless of alignment. Windows 7 can be observed making 1 byte
reads to the middle of 32 bit registers to fetch error codes.

Introduce a wrapper to support unaligned accesses to AHCI.
This wrapper will support aligned 8 byte reads, but will make
no effort to support unaligned 8 byte reads, which although they
will work on real hardware, are not guaranteed to work and do
not appear to be used by either Windows or Linux.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Eric Blake <address@hidden>
Message-id: address@hidden


  Commit: 0d3e9d1f598e803a02c9bf43ec0b053e873ca79a
      
https://github.com/qemu/qemu/commit/0d3e9d1f598e803a02c9bf43ec0b053e873ca79a
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M tests/ahci-test.c

  Log Message:
  -----------
  qtest/ahci: add test_max

Test that the FIS delivered after a nondata command has appropriately
updated registers, just as we'd expect a data command to do.

Signed-off-by: John Snow <address@hidden>
Message-id: address@hidden


  Commit: 95ea663693fdf4f39976f9aadb004fc77c2058ee
      
https://github.com/qemu/qemu/commit/95ea663693fdf4f39976f9aadb004fc77c2058ee
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M tests/libqos/ahci.c

  Log Message:
  -----------
  libqos/ahci: fix memory management bugs

There's a handful of trivial bugs in the libqos/ahci functions,
squish them together.

- Zero cached pointers after freeing them
- The Command List Buffer is an array of 32x 32 byte structures, not
  32x 8 byte pointers -- it's 1MiB, not 256 bytes. Zero it ALL.
- Free the correct command in ahci_pick_cmd.

Signed-off-by: John Snow <address@hidden>
Message-id: address@hidden


  Commit: d31a3ebc28bf401cc5cce43f36068697d670c3f9
      
https://github.com/qemu/qemu/commit/d31a3ebc28bf401cc5cce43f36068697d670c3f9
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M tests/ahci-test.c

  Log Message:
  -----------
  qtest/ahci: add port_reset test

Test that we can survive a couple of cycles of running a basic identify
test, some IO, and resetting the HBA. Ensures that we can bring the HBA
back to compliant spec during the lifecycle of the VM.

Signed-off-by: John Snow <address@hidden>
Message-id: address@hidden


  Commit: 7763ed1506a9ffe74a80332182cc4f229251f998
      
https://github.com/qemu/qemu/commit/7763ed1506a9ffe74a80332182cc4f229251f998
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.h

  Log Message:
  -----------
  ahci: Rename NCQFIS structure fields

Several fields of the NCQFIS structure are ambiguously named. This patch
clarifies the intended (if unsupported) usage of the NCQ fields to aid
in creating more meaningful debug messages through the NCQ codepaths.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: b6fe41fa6dbdf7b92b76cd4848ef442de18e03d3
      
https://github.com/qemu/qemu/commit/b6fe41fa6dbdf7b92b76cd4848ef442de18e03d3
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c

  Log Message:
  -----------
  ahci: use shorter variables

Trivial cleanup that I didn't want to tack-on to anything else.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: a55c8231d04e3023bc5c3da9290f01e7d6989a94
      
https://github.com/qemu/qemu/commit/a55c8231d04e3023bc5c3da9290f01e7d6989a94
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c

  Log Message:
  -----------
  ahci: add ncq_err helper

Set some appropriate error bits for NCQ for us.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 3bcbe4aa803c1a41e5392ecac7b4fc3c99a42f89
      
https://github.com/qemu/qemu/commit/3bcbe4aa803c1a41e5392ecac7b4fc3c99a42f89
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c

  Log Message:
  -----------
  ahci: check for ncq prdtl overflow

Don't attempt the NCQ transfer if the PRDT we were given is not big
enough to perform the entire transfer.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: d56f4d6965ebcf8f3c496845c286e3a66496fdff
      
https://github.com/qemu/qemu/commit/d56f4d6965ebcf8f3c496845c286e3a66496fdff
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c
    M hw/ide/ahci.h

  Log Message:
  -----------
  ahci: separate prdtl from opts

There's no real reason to have it bundled together, and this way
is a little nicer to follow if you have the AHCI spec pulled up.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 5d5f89212f19e3d7d3da1328137ca9e33eead7bf
      
https://github.com/qemu/qemu/commit/5d5f89212f19e3d7d3da1328137ca9e33eead7bf
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c

  Log Message:
  -----------
  ahci: add ncq debug checks

Most of the time, these bits can be safely ignored. For the purposes
of debugging however, it's nice to know that they're not being used.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 0437d32ae232af37d3b94064a563eb51d4eedd62
      
https://github.com/qemu/qemu/commit/0437d32ae232af37d3b94064a563eb51d4eedd62
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c

  Log Message:
  -----------
  ahci: ncq sector count correction

This value should not be size-corrected, 0 sectors does not imply
1 sector(s). This is just debug information, but it's misleading!

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 34475239b8f1fff0b715cb20f8b534b9d07a897e
      
https://github.com/qemu/qemu/commit/34475239b8f1fff0b715cb20f8b534b9d07a897e
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M tests/ahci-test.c

  Log Message:
  -----------
  ahci/qtest: Execute IDENTIFY prior to data commands

If you try to execute an NCQ command before trying to engage with the
device by issuing an IDENTIFY command, the error bits that are part of
the signature will fool the test suite into thinking there was a failure.

Issue IDENTIFY first on "boot", which will clear the signature out of
the registers for us.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 40d29928caa6db154182f5314f497020f81e640e
      
https://github.com/qemu/qemu/commit/40d29928caa6db154182f5314f497020f81e640e
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M tests/libqos/ahci.c
    M tests/libqos/ahci.h

  Log Message:
  -----------
  libqos/ahci: fix cmd_sanity for ncq

NCQ commands should not / do not update the byte count
in the command header post command, so this field is
meaningless for NCQ tests.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: cb45304108ab733aaf2e4351e77cb6d07ac88fd5
      
https://github.com/qemu/qemu/commit/cb45304108ab733aaf2e4351e77cb6d07ac88fd5
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M tests/libqos/ahci.c
    M tests/libqos/ahci.h

  Log Message:
  -----------
  libqos/ahci: add NCQ frame support

NCQ frames are generated a little differently than
their non-NCQ cousins. Add support for them.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 4de484698bdda6c5e093dfbe4368cdb364fdf87f
      
https://github.com/qemu/qemu/commit/4de484698bdda6c5e093dfbe4368cdb364fdf87f
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M tests/libqos/ahci.c

  Log Message:
  -----------
  libqos/ahci: edit wait to be ncq aware

The wait command should check to make sure SACT is clear as well
as the Command Issue register.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 359790c2542a8c4da3d4c8fb626ca2675a417d51
      
https://github.com/qemu/qemu/commit/359790c2542a8c4da3d4c8fb626ca2675a417d51
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M tests/libqos/ahci.c

  Log Message:
  -----------
  libqos/ahci: adjust expected NCQ interrupts

NCQ commands will expect the SDBS interrupt,
and in the normative case, do not expect to see
a D2H Register FIS unless something went wrong.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: a8973ff50a04f96c3ce5c803c8fd3ec16ed8d6c5
      
https://github.com/qemu/qemu/commit/a8973ff50a04f96c3ce5c803c8fd3ec16ed8d6c5
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M tests/libqos/ahci.c

  Log Message:
  -----------
  libqos/ahci: set the NCQ tag on command_commit

NCQ commands have the concept of a "TAG" that they need to set,
but in the AHCI world, it is mandated that the TAG always match
the command slot that you executed the NCQ from.

See AHCI 9.3.1.1.5.2 "Native Queued Commands".

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: e38cc93aca5d40a58e65bb0dfa23eaf3290bbf76
      
https://github.com/qemu/qemu/commit/e38cc93aca5d40a58e65bb0dfa23eaf3290bbf76
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M tests/libqos/ahci.c

  Log Message:
  -----------
  libqos/ahci: Force all NCQ commands to be LBA48

NCQ commands are LBA48 by definition.

See SATA 3.2 13.6.4.1 "READ FPDMA QUEUED", or
    SATA 3.2 13.6.5.1 "WRITE FPDMA QUEUED."

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 26ad004585835e7c126bb94fd5161db1c60169f3
      
https://github.com/qemu/qemu/commit/26ad004585835e7c126bb94fd5161db1c60169f3
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M tests/ahci-test.c
    M tests/libqos/ahci.c
    M tests/libqos/ahci.h

  Log Message:
  -----------
  qtest/ahci: simple ncq data test

Test the NCQ pathways for a simple IO RW test.
Also, test that libqos doesn't explode when
running NCQ commands :)

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 07a1ee7958cc3433706ab0d3a07c42fdd9d98fe6
      
https://github.com/qemu/qemu/commit/07a1ee7958cc3433706ab0d3a07c42fdd9d98fe6
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M tests/ahci-test.c

  Log Message:
  -----------
  qtest/ahci: ncq migration test

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: a718978ed58abc1ad92567a9c17525136be02a71
      
https://github.com/qemu/qemu/commit/a718978ed58abc1ad92567a9c17525136be02a71
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c
    M hw/ide/core.c
    M hw/ide/internal.h
    M hw/ide/macio.c
    M hw/ide/pci.c

  Log Message:
  -----------
  ide: add limit to .prepare_buf()

prepare_buf should not always grab as many descriptors
as it can, sometimes it should self-limit.

For example, an NCQ transfer of 1 sector with a PRDT that
describes 4GiB of data should not copy 4GiB of data, it
should just transfer that first 512 bytes.

PIO is not affected, because the dma_buf_rw dma helpers
already have a byte limit built-in to them, but DMA/NCQ
will exhaust the entire list regardless of requested size.

AHCI 1.3 specifies in section 6.1.6 Command List Underflow that
NCQ is not required to detect underflow conditions. Non-NCQ
pathways signal underflow by writing to the PRDBC field, which
will already occur by writing the actual transferred byte count
to the PRDBC, signaling the underflow.

Our NCQ pathways aren't required to detect underflow, but since our DMA
backend uses the size of the PRDT to determine the size of the transer,
if our PRDT is bigger than the transaction (the underflow condition) it
doesn't cost us anything to detect it and truncate the PRDT.

This is a recoverable error and is not signaled to the guest, in either
NCQ or normal DMA cases.

For BMDMA, the existing pathways should see no guest-visible difference,
but any bytes described in the overage will no longer be transferred
before indicating to the guest that there was an underflow.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 4614619ee4ad96d2715dc41f9430fb43335c15d2
      
https://github.com/qemu/qemu/commit/4614619ee4ad96d2715dc41f9430fb43335c15d2
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c
    M hw/ide/ahci.h

  Log Message:
  -----------
  ahci: stash ncq command

For migration and werror=stop/rerror=stop resume purposes,
it will be convenient to have the command handy inside of
ncq_tfs.

Eventually, we'd like to avoid reading from the FIS entirely
after the initial read, so this is a byte (hah!) sized step
in that direction.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 922f893e57da24bc80db3e79bea56485d1c111fa
      
https://github.com/qemu/qemu/commit/922f893e57da24bc80db3e79bea56485d1c111fa
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c

  Log Message:
  -----------
  ahci: assert is_ncq for process_ncq

We already checked this in the handle_cmd phase, so just
change this to an assertion and simplify the error logic.

(Also, fix the switch indent, because checkpatch.pl yelled.)
((Sorry for churn.))

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 631ddc22cbb401f2777dc8b117196f0988df4eea
      
https://github.com/qemu/qemu/commit/631ddc22cbb401f2777dc8b117196f0988df4eea
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c

  Log Message:
  -----------
  ahci: refactor process_ncq_command

Split off execute_ncq_command so that we can call
it separately later if we desire.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 54f3223730736fca1e6e89bb7f99c4f8432fdabb
      
https://github.com/qemu/qemu/commit/54f3223730736fca1e6e89bb7f99c4f8432fdabb
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c

  Log Message:
  -----------
  ahci: factor ncq_finish out of ncq_cb

When we add werror=stop or rerror=stop support to NCQ,
we'll want to take a codepath where we don't actually
complete the command, so factor that out into a new routine.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 7c03a691077e71a08bbca06568cd97f09537458c
      
https://github.com/qemu/qemu/commit/7c03a691077e71a08bbca06568cd97f09537458c
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c
    M hw/ide/ahci.h
    M hw/ide/core.c
    M hw/ide/internal.h

  Log Message:
  -----------
  ahci: add rwerror=stop support for ncq

Handle NCQ failures for cases where we want to halt the VM on IO errors.
Upon a VM state change, retry the halted NCQ commands.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 9364384de0e3b8a5bdea67ba49bee9ea7f1b8f26
      
https://github.com/qemu/qemu/commit/9364384de0e3b8a5bdea67ba49bee9ea7f1b8f26
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c
    M hw/ide/ahci.h

  Log Message:
  -----------
  ahci: correct types in NCQTransferState

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: e08a98357b5811e7933ff077f6da4b85175caf8a
      
https://github.com/qemu/qemu/commit/e08a98357b5811e7933ff077f6da4b85175caf8a
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c
    M hw/ide/ahci.h

  Log Message:
  -----------
  ahci: correct ncq sector count

uint16_t isn't enough to hold the real sector count, since a value of
zero implies a full 64K sectors, so we need a uint32_t here.

We *could* cheat and pretend that this value is 0-based and fit it in
a uint16_t, but I'd rather waste 2 bytes instead of a future dev's
10 minutes when they forget to +1/-1 accordingly somewhere.

See SATA 3.2, section 13.6.4.1 "READ FPDMA QUEUED".

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 7f6cf5ee1236d94fc25830a47438e57aa294d9fe
      
https://github.com/qemu/qemu/commit/7f6cf5ee1236d94fc25830a47438e57aa294d9fe
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M tests/ahci-test.c

  Log Message:
  -----------
  qtest/ahci: halted NCQ test

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: c82bd3c893825fc76af3634f5461f5eabd94e9df
      
https://github.com/qemu/qemu/commit/c82bd3c893825fc76af3634f5461f5eabd94e9df
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c
    M hw/ide/ahci.h

  Log Message:
  -----------
  ahci: add cmd header to ncq transfer state

While the rest of the AHCI device can rely on a single bookmarked
pointer for the AHCI Command Header currently being processed, NCQ
is asynchronous and may have many commands in flight simultaneously.

Add a cmdh pointer to the ncq_tfs object and make the sglist prepare
function take an AHCICmdHeader pointer so we can be explicit about
where we'd like to build SGlists from.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: ee364416c1b5ed1adc779ca7197451a131666236
      
https://github.com/qemu/qemu/commit/ee364416c1b5ed1adc779ca7197451a131666236
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c

  Log Message:
  -----------
  ahci: add get_cmd_header helper

cur_cmd is an internal bookmark that points to the
current AHCI Command Header being processed by the
AHCI state machine. With NCQ needing to occasionally
rely on some of the same AHCI helpers, we cannot use
cur_cmd and will need to grab explicit pointers instead.

In an attempt to begin relying on the cur_cmd pointer
less, add a helper to let us specifically get the pointer
to the command header of particular interest.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 684d50132fdd68f4c2cba9e65b50f9b8ef4c5164
      
https://github.com/qemu/qemu/commit/684d50132fdd68f4c2cba9e65b50f9b8ef4c5164
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c

  Log Message:
  -----------
  ahci: ncq migration

Migrate the NCQ queue. This is solely for the benefit of halted commands,
since anything else should have completed and had any relevant status
flushed to the HBA registers already.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: dd6282217d8fee36e3854eab2635bec9cc5d5236
      
https://github.com/qemu/qemu/commit/dd6282217d8fee36e3854eab2635bec9cc5d5236
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c

  Log Message:
  -----------
  ahci: Do not map cmd_fis to generate response

The Register D2H FIS should copy the current values of
the registers instead of just parroting back the same
values the guest sent back to it.

In this case, the SECTOR COUNT variables are actually
not generally meaningful in terms of standard commands
(See ATA8-AC3 Section 9.2 Normal Outputs), so it actually
probably doesn't matter what we put in here.

Meanwhile, we do need to use the Register update FIS from
the NCQ pathways (in error cases), so getting rid of
references to cur_cmd here is a win for AHCI concurrency.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 8146d7dc2756138bd4011e8d882ead929f25f2d0
      
https://github.com/qemu/qemu/commit/8146d7dc2756138bd4011e8d882ead929f25f2d0
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M tests/ahci-test.c

  Log Message:
  -----------
  qtest/ahci: halted ncq migration test

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 7c649ac5b607e2339fb54fc0fc01311ba5eacadd
      
https://github.com/qemu/qemu/commit/7c649ac5b607e2339fb54fc0fc01311ba5eacadd
  Author: John Snow <address@hidden>
  Date:   2015-07-04 (Sat, 04 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c

  Log Message:
  -----------
  ahci: fix sdb fis semantics

There are two things to fix here:

The first one is subtle: the PxSACT register in the AHCI HBA has different
semantics from the field it is shadowing, the ACT field in the
Set Device Bits FIS.

In the HBA register, PxSACT acts as a bitfield indicating outstanding
NCQ commands where a set bit indicates a pending NCQ operation. The FIS
field however operates as an RWC register update to PxSACT, where a set
bit indicates a *successfully* completed command.

Correct the FIS semantics. At the same time, move the "clear finished"
action to the SDB FIS generation instead of the register read to mimick
how the other shadow registers work, which always just report the last
reported value from a FIS, and not the most current values which may
not have been reported by a FIS yet.

Lastly and more simply, SATA 3.2 section 13.6.4.2 (and later sections)
all specify that the Interrupt bit for the SDB FIS should always be set
to one for NCQ commands. That's currently the only time we generate this
FIS, so set it on all the time.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: f50a1640fb82708a5d528dee1ace42a224b95b15
      
https://github.com/qemu/qemu/commit/f50a1640fb82708a5d528dee1ace42a224b95b15
  Author: Peter Maydell <address@hidden>
  Date:   2015-07-05 (Sun, 05 Jul 2015)

  Changed paths:
    M hw/ide/ahci.c
    M hw/ide/ahci.h
    M hw/ide/core.c
    M hw/ide/internal.h
    M hw/ide/macio.c
    M hw/ide/pci.c
    M tests/ahci-test.c
    M tests/libqos/ahci.c
    M tests/libqos/ahci.h

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into 
staging

# gpg: Signature made Sat Jul  4 07:06:08 2015 BST using RSA key ID AAFC390E
# gpg: Good signature from "John Snow (John Huston) <address@hidden>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: FAEB 9711 A12C F475 812F  18F2 88A9 064D 1835 61EB
#      Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76  CBD0 7DEF 8106 AAFC 390E

* remotes/jnsnow/tags/ide-pull-request: (35 commits)
  ahci: fix sdb fis semantics
  qtest/ahci: halted ncq migration test
  ahci: Do not map cmd_fis to generate response
  ahci: ncq migration
  ahci: add get_cmd_header helper
  ahci: add cmd header to ncq transfer state
  qtest/ahci: halted NCQ test
  ahci: correct ncq sector count
  ahci: correct types in NCQTransferState
  ahci: add rwerror=stop support for ncq
  ahci: factor ncq_finish out of ncq_cb
  ahci: refactor process_ncq_command
  ahci: assert is_ncq for process_ncq
  ahci: stash ncq command
  ide: add limit to .prepare_buf()
  qtest/ahci: ncq migration test
  qtest/ahci: simple ncq data test
  libqos/ahci: Force all NCQ commands to be LBA48
  libqos/ahci: set the NCQ tag on command_commit
  libqos/ahci: adjust expected NCQ interrupts
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/63a9294ddc9c...f50a1640fb82

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