[Qemu-commits] [qemu/qemu] d29811: ppc: fix monitor access to CR

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[Qemu-commits] [qemu/qemu] d29811: ppc: fix monitor access to CR

From:	GitHub
Subject:	[Qemu-commits] [qemu/qemu] d29811: ppc: fix monitor access to CR
Date:	Wed, 05 Nov 2014 05:00:06 -0800
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: d29811806067de1516c2f94c0a81885fe2076fc8
      
https://github.com/qemu/qemu/commit/d29811806067de1516c2f94c0a81885fe2076fc8
  Author: Paolo Bonzini <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M monitor.c

  Log Message:
  -----------
  ppc: fix monitor access to CR

This was off-by-one.

Signed-off-by: Paolo Bonzini <address@hidden>
Reviewed-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 72189ea41d3a9748ffc740a3af1b98abc551aa09
      
https://github.com/qemu/qemu/commit/72189ea41d3a9748ffc740a3af1b98abc551aa09
  Author: Paolo Bonzini <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/int_helper.c

  Log Message:
  -----------
  ppc: use CRF_* in int_helper.c

Signed-off-by: Paolo Bonzini <address@hidden>
Reviewed-by: Tom Musta <address@hidden>
Tested-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: ebbd8b40a9f8dcc9ff048c2ce82a6219e4e80d38
      
https://github.com/qemu/qemu/commit/ebbd8b40a9f8dcc9ff048c2ce82a6219e4e80d38
  Author: Paolo Bonzini <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/int_helper.c

  Log Message:
  -----------
  ppc: fix result of DLMZB when no zero bytes are found

It must return 8 and place 8 in XER, but the current code uses
i directly which is 9 at this point of the code.

Signed-off-by: Paolo Bonzini <address@hidden>
Reviewed-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: e57d02022c4ba748fa6c0916319f9108c4502cb9
      
https://github.com/qemu/qemu/commit/e57d02022c4ba748fa6c0916319f9108c4502cb9
  Author: Paolo Bonzini <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  ppc: rename gen_set_cr6_from_fpscr

It sets CR1, not CR6 (and the spec agrees).

Signed-off-by: Paolo Bonzini <address@hidden>
Reviewed-by: Tom Musta <address@hidden>
Tested-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 8f9fb7ac4915dc12c23f9ebbd65808afb780abff
      
https://github.com/qemu/qemu/commit/8f9fb7ac4915dc12c23f9ebbd65808afb780abff
  Author: Paolo Bonzini <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  ppc: compute mask from BI using right shift

This will match the code we use in fpu_helper.c when we flip
CRF_* bit-endianness.

Signed-off-by: Paolo Bonzini <address@hidden>
Reviewed-by: Tom Musta <address@hidden>
Tested-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 0b6ff57640a3d51a9738af553a05007a86df332e
      
https://github.com/qemu/qemu/commit/0b6ff57640a3d51a9738af553a05007a86df332e
  Author: Alexey Kardashevskiy <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/translate_init.c

  Log Message:
  -----------
  target-ppc: Fix kvmppc_set_compat to use negotiated cpu-version

By mistake, QEMU uses the maximum compatibility level from the command
line instead of the value negotiated in client-architecture-support call.

This replaces @max_compat with @cpu_version. This only affects guests
which do not support the host CPU.

Signed-off-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 8412d1127664775bb4e657d51522a1c777a7e9d5
      
https://github.com/qemu/qemu/commit/8412d1127664775bb4e657d51522a1c777a7e9d5
  Author: Tom Musta <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/translate_init.c

  Log Message:
  -----------
  target-ppc: Implement IVOR[59] By Default for Book E

Adjust the IVOR mask for generic Book E implementation to support bit 59.
This is consistent with the Power ISA.

Signed-off-by: Tom Musta <address@hidden>
Reported-by: Pierre Mallard <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 0691e8ebce51e4e3bf0c76c41d8b534e3cde47ee
      
https://github.com/qemu/qemu/commit/0691e8ebce51e4e3bf0c76c41d8b534e3cde47ee
  Author: David Gibson <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/ppc/Makefile.objs

  Log Message:
  -----------
  target-ppc: virtex-ml507 machine type should depend on CONFIG_XILINX

The virtex-ml507 is a Xilinx CPU based system, and requires several sub
devices which are only included with CONFIG_XILINX.  Therefore, it should
only be compiled if CONFIG_XILINX is set.

Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 4aee73623d0141c5d4ce4754fc054689fb92f0e5
      
https://github.com/qemu/qemu/commit/4aee73623d0141c5d4ce4754fc054689fb92f0e5
  Author: David Gibson <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/ppc/spapr.c

  Log Message:
  -----------
  spapr: Cleanup machine naming conventions, and prepare for 2.2 release

As of qemu-2.1, spapr/pseries, has a set of versioned machine classes to
represent the machine type as it appeared to the guest in different qemu
versions.  This allows for safe migration of guests between current and
future qemu versions.

However, these are organized a bit differently from those for PC: on PC,
the default plain "pc" machine type is just an alias for the most recent
versioned machine type.  In sPAPR, it names the base machine class from
which the versioned types are derived.

The PC approach is preferable; it makes it clearer which explicit version
is the current one.  Additionally updating the "current" machine as the
base class makes it even more likely than otherwise to incorrectly alter
the versioned machines' behaviour when updating the current machine.

Therefore this patch changes sPAPR to the PC approach - the base class
becomes abstract, and plain "pseries" becomes an alias for the most
recent versioned machine class.  Since qemu-2.1 is now released, we also
create a new pseries-2.2 machine type, to incorporate changes during this
development cycle (for now it is identical to pseries-2.1).

Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 9ac58dc59aaf9db20ec17df9b372915bee9b0f02
      
https://github.com/qemu/qemu/commit/9ac58dc59aaf9db20ec17df9b372915bee9b0f02
  Author: Alexander Graf <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/intc/openpic_kvm.c

  Log Message:
  -----------
  PPC: openpic_kvm: Only map first occurence in address space

The in-kernel OpenPIC emulation only supports a single map. However, we
map the OpenPIC at 2 locations: The CPU visible one and the PCI visible
one. For KVM acceleration, we only care about the first one.

To make sure that we only map that first mapping and not the PCI map that
happens dynamically later during bootup, ignore maps that happen when
we are already considering ourselves mapped.

Credits due are to Bogdan and Mihai for debugging this.

Reported-by: Bogdan Purcareata <address@hidden>
Reported-by: Mihai Caraman <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 4171853cf4dfb88da93bf77a4c9d319d6ba2bdc6
      
https://github.com/qemu/qemu/commit/4171853cf4dfb88da93bf77a4c9d319d6ba2bdc6
  Author: Pierre Mallard <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/cpu.h
    M target-ppc/fpu_helper.c
    M target-ppc/helper.h
    M target-ppc/translate.c
    M target-ppc/translate_init.c

  Log Message:
  -----------
  target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64

This patch remove limitation for fc[tf]id[*] on 32 bits targets and
add a new insn flag for signed integer 64 conversion PPC2_FP_CVT_S64

Signed-off-by: Pierre Mallard <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: b8c867ed0961e22938c2be4903f13f46b52f84f7
      
https://github.com/qemu/qemu/commit/b8c867ed0961e22938c2be4903f13f46b52f84f7
  Author: Pierre Mallard <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/cpu-models.c
    M target-ppc/translate_init.c

  Log Message:
  -----------
  target-ppc : Add new processor type 440x5wDFPU

This patch add a new processor type 440x5wDFPU for Virtex 5 PPC440
with an external APU FPU in double precision mode

Signed-off-by: Pierre Mallard <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: bf362e96106648f5dd53c7a4af4e5aed3ef09f5d
      
https://github.com/qemu/qemu/commit/bf362e96106648f5dd53c7a4af4e5aed3ef09f5d
  Author: Peter Maydell <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/ppc/ppc4xx_pci.c

  Log Message:
  -----------
  hw/pci/ppc4xx_pci.c: Remove unused pci4xx_cfgaddr_read/write/ops

The MemoryRegionOps struct pci4xx_cfgaddr_ops and the read and
write functions it references are all unused; remove them.

Signed-off-by: Peter Maydell <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 54ff58bb10acd6938b43dd3504ece4a7f4eb3fa1
      
https://github.com/qemu/qemu/commit/54ff58bb10acd6938b43dd3504ece4a7f4eb3fa1
  Author: Bharata B Rao <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/cpu.h
    M target-ppc/translate_init.c

  Log Message:
  -----------
  target-ppc: Use macros in opcodes table handling code

Define and use macros instead of direct numbers wherever
possible in ppc opcodes table handling code.

This doesn't change any code functionality.

Signed-off-by: Bharata B Rao <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 81f194dd69756677cc36ff0827bf970f0f048914
      
https://github.com/qemu/qemu/commit/81f194dd69756677cc36ff0827bf970f0f048914
  Author: Bharata B Rao <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/translate_init.c

  Log Message:
  -----------
  target-ppc: Fix an invalid free in opcode table handling code.

Opcode table has direct, indirect and double indirect handlers, but
ppc_cpu_unrealizefn() frees direct handlers which are never allocated
and never frees double indirect handlers.

Signed-off-by: Bharata B Rao <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 228aa992fc5be408888c423b6a5b30daf18a96cf
      
https://github.com/qemu/qemu/commit/228aa992fc5be408888c423b6a5b30daf18a96cf
  Author: Alexander Graf <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/gpio/Makefile.objs
    A hw/gpio/mpc8xxx.c

  Log Message:
  -----------
  PPC: Add MPC8XXX gpio controller

On e500 systems most SoCs implement a common GPIO controller that Linux
calls the "mpc8xxx" gpio controller. This patch adds an emulation model
for this device.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: b88e77f49331f1187118b7ce2494ec169d3a865a
      
https://github.com/qemu/qemu/commit/b88e77f49331f1187118b7ce2494ec169d3a865a
  Author: Alexander Graf <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/ppc/e500.c
    M hw/ppc/e500.h
    M hw/ppc/e500plat.c

  Log Message:
  -----------
  PPC: E500: Instantiate MPC8XXX gpio controller on virt machine

With the e500 virt machine, we don't have to adhere to the exact hardware
layout of an mpc8544ds board. So there we can just add a qoriq compatible
GPIO controller into the system that we can add a power off hook to.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: 016f7758985290c8ca79fc9842fd697d61cbc0b0
      
https://github.com/qemu/qemu/commit/016f7758985290c8ca79fc9842fd697d61cbc0b0
  Author: Alexander Graf <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/ppc/e500.c

  Log Message:
  -----------
  PPC: E500: Hook up power off GPIO to GPIO controller

Now that we have a working GPIO controller on the virt machine, we can use
one pin to notify QEMU that the guests wants to power off the system.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: f58aa483145789fbcc3b8a39873ce2b45d5b8d52
      
https://github.com/qemu/qemu/commit/f58aa483145789fbcc3b8a39873ce2b45d5b8d52
  Author: Alexey Kardashevskiy <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/nvram/spapr_nvram.c

  Log Message:
  -----------
  spapr_nvram: Enable migration

The only case when sPAPR NVRAM migrates now is if is backed by a file and
copy-storage migration is performed. In other cases NVRAM does not
migrate regardless whether it is backed by a file or not.

This enables shadow copy of NVRAM in RAM which is read from a file
(if used) and used for reads. Writes to NVRAM are mirrored to the file.

This defines a VMSTATE descriptor for NVRAM device so the memory copy
of NVRAM can migrate and be flushed to a backing file on the destination
if one is specified.

Signed-off-by: Alexey Kardashevskiy <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: cc64b1a1940dc2e041c5b06b003d9acf64c22372
      
https://github.com/qemu/qemu/commit/cc64b1a1940dc2e041c5b06b003d9acf64c22372
  Author: Chen Gang <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/kvm.c

  Log Message:
  -----------
  target-ppc: kvm: Fix memory overflow issue about strncat()

strncat() will append additional '\0' to destination buffer, so need
additional 1 byte for it, or may cause memory overflow, just like other
area within QEMU have done.

And can use g_strdup_printf() instead of strncat(), which may be more
easier understanding.

Signed-off-by: Chen Gang <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: c47493f24fd4f16cffc1130d071b783f4453b7a3
      
https://github.com/qemu/qemu/commit/c47493f24fd4f16cffc1130d071b783f4453b7a3
  Author: Paolo Bonzini <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  ppc: do not look at the MMU index to detect PR/HV mode

The MMU index is an internal detail that should not be needed by the
translator (except to generate loads and stores).  Look at the MSR
directly.

Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: f8833a37c0c6b22ddd57b45e48cfb0f97dbd5af4
      
https://github.com/qemu/qemu/commit/f8833a37c0c6b22ddd57b45e48cfb0f97dbd5af4
  Author: Peter Maydell <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/ppc/spapr_pci.c

  Log Message:
  -----------
  hw/ppc/spapr_pci.c: Avoid functions not in glib 2.12 (g_hash_table_iter_*)

The g_hash_table_iter_* functions for iterating through a hash table
are not present in glib 2.12, which is our current minimum requirement.
Rewrite the code to use g_hash_table_foreach() instead.

Signed-off-by: Peter Maydell <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: eb5722801c84f23428c50e2336d02e400ce55deb
      
https://github.com/qemu/qemu/commit/eb5722801c84f23428c50e2336d02e400ce55deb
  Author: Alexander Graf <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/core/sysbus.c
    M include/hw/sysbus.h

  Log Message:
  -----------
  sysbus: Add dynamic sysbus device search

Sysbus devices can be spawned by C code or dynamically via the command line.
In the latter case, we need to be able to find the dynamically created devices
to do things with them.

This patch adds a search helper that makes it easy to look for dynamically
spawned sysbus devices.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: 33cd52b5d7b9adfd009e95f07e6c64dd88ae2a31
      
https://github.com/qemu/qemu/commit/33cd52b5d7b9adfd009e95f07e6c64dd88ae2a31
  Author: Alexander Graf <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/core/machine.c
    M hw/core/sysbus.c
    M include/hw/boards.h
    M vl.c

  Log Message:
  -----------
  sysbus: Make devices spawnable via -device

Now that we can properly map sysbus devices that haven't been connected to
something forcefully by C code, we can allow the -device command line option
to spawn them.

For machines that don't implement dynamic sysbus assignment in their board
files we add a new bool "has_dynamic_sysbus" to the machine class.
When that property is false (default), we bail out when we see dynamically
spawned sysbus devices, like we did before.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: b797318666dade9675a253d311125ae7b568e2f8
      
https://github.com/qemu/qemu/commit/b797318666dade9675a253d311125ae7b568e2f8
  Author: Alexander Graf <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/core/qdev.c
    M hw/core/sysbus.c
    M include/hw/qdev-core.h
    M include/hw/sysbus.h

  Log Message:
  -----------
  sysbus: Expose IRQ enumeration helpers

Sysbus devices can get their IRQ lines connected to other devices. It is
possible to figure out which IRQ line a connection is on and whether a sysbus
device even provides an IRQ connector at a specific offset.

This patch exposes helpers to make this information publicly accessible. We
will need it for the platform bus dynamic sysbus enumeration.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: 471a9bc14444e79bb826616becd2e5531e591d30
      
https://github.com/qemu/qemu/commit/471a9bc14444e79bb826616becd2e5531e591d30
  Author: Alexander Graf <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/core/sysbus.c
    M include/hw/sysbus.h

  Log Message:
  -----------
  sysbus: Expose MMIO enumeration helper

Sysbus devices have a range of MMIO regions they expose. The exact number
of regions is device specific and internal information to the device model.

Expose whether a region exists via a public interface. That way our platform
bus enumeration code can dynamically determine how many regions exist.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: 7634fe3c273ca2f2eb992b3b6bb7796b85558377
      
https://github.com/qemu/qemu/commit/7634fe3c273ca2f2eb992b3b6bb7796b85558377
  Author: Alexander Graf <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/core/Makefile.objs
    A hw/core/platform-bus.c
    A include/hw/platform-bus.h

  Log Message:
  -----------
  sysbus: Add new platform bus helper device

We need to support spawning of sysbus devices dynamically via the command line.
The easiest way to represent these dynamically spawned devices in the guest's
memory and IRQ layout is by preallocating some space for dynamic sysbus devices.

This is what the "platform bus" device does. It is a sysbus device that exports
a configurably sized MMIO region and a configurable number of IRQ lines. When
this device encounters sysbus devices that have been dynamically created and not
manually wired up, it dynamically connects them to its own pool of resources.

The machine model can then loop through all of these devices and create a guest
configuration (device tree) to make them visible to the guest.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: f70873438d40ccda3d1614ec18a141aad5da2778
      
https://github.com/qemu/qemu/commit/f70873438d40ccda3d1614ec18a141aad5da2778
  Author: Alexander Graf <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/ppc/e500.c
    M hw/ppc/e500.h
    M hw/ppc/e500plat.c

  Log Message:
  -----------
  PPC: e500: Support dynamically spawned sysbus devices

For e500 our approach to supporting dynamically spawned sysbus devices is to
create a simple bus from the guest's point of view within which we map those
devices dynamically.

We allocate memory regions always within the "platform" hole in address
space and map IRQs to predetermined IRQ lines that are reserved for platform
device usage.

This maps really nicely into device tree logic, so we can just tell the
guest about our virtual simple bus in device tree as well.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: fdfb7f2cdb2d0ed364a8c8c538d0ece8c464b534
      
https://github.com/qemu/qemu/commit/fdfb7f2cdb2d0ed364a8c8c538d0ece8c464b534
  Author: Alexander Graf <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/ppc/e500.c

  Log Message:
  -----------
  e500: Add support for eTSEC in device tree

This patch adds support to expose eTSEC devices in the dynamically created
guest facing device tree. This allows us to expose eTSEC devices into guests
without changes in the machine file.

Because we can now tell the guest about eTSEC devices this patch allows the
user to specify eTSEC devices via -device at all.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: 36cbde7c30ead127dcd7c03b96d4dabf10a6d6c5
      
https://github.com/qemu/qemu/commit/36cbde7c30ead127dcd7c03b96d4dabf10a6d6c5
  Author: Aurelien Jarno <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/int_helper.c

  Log Message:
  -----------
  target-ppc: simplify AES emulation

This patch simplifies the AES code, by directly accessing the newly added
S-Box, InvS-Box tables instead of recreating them by using the AES_Te and
AES_Td tables.

Cc: Alexander Graf <address@hidden>
Cc: Paolo Bonzini <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Reviewed-by: Paolo Bonzini <address@hidden>
Tested-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 24e669ba531a0ffb5e5c3583bc39ff84eaeabf16
      
https://github.com/qemu/qemu/commit/24e669ba531a0ffb5e5c3583bc39ff84eaeabf16
  Author: Tom Musta <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/int_helper.c

  Log Message:
  -----------
  target-ppc: Fix Altivec Shifts

Fix the implementation of the Altivec shift left and shift right
instructions (vsl, vsr) which erroneously inverts shift direction
on big endian hosts.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 4007b8de6e1012675672d6e6e4fc08633b3a0023
      
https://github.com/qemu/qemu/commit/4007b8de6e1012675672d6e6e4fc08633b3a0023
  Author: Tom Musta <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/int_helper.c

  Log Message:
  -----------
  target-ppc: Fix vcmpbfp. Unordered Case

Fix the implementation of Vector Compare Bounds Single Precision.
Specifically, fix the case where the operands are unordered -- since
the result is non-zero, the CR[6] field should be set to zero.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: abe60a439b760c749201b6b9956968d6f030ebd7
      
https://github.com/qemu/qemu/commit/abe60a439b760c749201b6b9956968d6f030ebd7
  Author: Tom Musta <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: Fix Altivec Round Opcodes

Correct the opcodes for the vrfim, vrfin and vrfiz instructions.

Signed-off-by: Tom Musta <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 9e3f973335afb3d5758aeebeb3ad478427d79bd4
      
https://github.com/qemu/qemu/commit/9e3f973335afb3d5758aeebeb3ad478427d79bd4
  Author: Alexander Graf <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/ppc/spapr.c

  Log Message:
  -----------
  spapr: Allow dynamic creation of PHB

Now that we finally check for presence of dangling sysbus devices, make check
started complaining that the sPAPR PHB is one such device.

However, it really isn't. The spapr PHB is not really a traditional sysbus
device, but much more a special spapr pv device which is already able to get
created dynamically.

Move spapr to its own dynamic sysbus check handling and allow PHB devices to
get allocated dynamically.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: c8d943303d5d7ef6a0200d5396ba0f6404f2eb14
      
https://github.com/qemu/qemu/commit/c8d943303d5d7ef6a0200d5396ba0f6404f2eb14
  Author: Peter Maydell <address@hidden>
  Date:   2014-11-04 (Tue, 04 Nov 2014)

  Changed paths:
    M hw/core/Makefile.objs
    M hw/core/machine.c
    A hw/core/platform-bus.c
    M hw/core/qdev.c
    M hw/core/sysbus.c
    M hw/gpio/Makefile.objs
    A hw/gpio/mpc8xxx.c
    M hw/intc/openpic_kvm.c
    M hw/nvram/spapr_nvram.c
    M hw/ppc/Makefile.objs
    M hw/ppc/e500.c
    M hw/ppc/e500.h
    M hw/ppc/e500plat.c
    M hw/ppc/ppc4xx_pci.c
    M hw/ppc/spapr.c
    M hw/ppc/spapr_pci.c
    M include/hw/boards.h
    A include/hw/platform-bus.h
    M include/hw/qdev-core.h
    M include/hw/sysbus.h
    M monitor.c
    M target-ppc/cpu-models.c
    M target-ppc/cpu.h
    M target-ppc/fpu_helper.c
    M target-ppc/helper.h
    M target-ppc/int_helper.c
    M target-ppc/kvm.c
    M target-ppc/translate.c
    M target-ppc/translate_init.c
    M vl.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' 
into staging

Patch queue for ppc - 2014-11-04

Fun things for 2.2:

  - e500 virt machine: power off support (needs 3.19 guests)
  - e500 virt machine: -device eTSEC support
  - new framework to allow dynamic spawning of sysbus devices
  - spapr: enable migration of nvram
  - new 440x5wDFPU cpu type
  - Altivec and other random fixes

# gpg: Signature made Tue 04 Nov 2014 22:26:39 GMT using RSA key ID 03FEDC60
# gpg: Good signature from "Alexander Graf <address@hidden>"
# gpg:                 aka "Alexander Graf <address@hidden>"

* remotes/agraf/tags/signed-ppc-for-upstream: (34 commits)
  spapr: Allow dynamic creation of PHB
  target-ppc: Fix Altivec Round Opcodes
  target-ppc: Fix vcmpbfp. Unordered Case
  target-ppc: Fix Altivec Shifts
  target-ppc: simplify AES emulation
  e500: Add support for eTSEC in device tree
  PPC: e500: Support dynamically spawned sysbus devices
  sysbus: Add new platform bus helper device
  sysbus: Expose MMIO enumeration helper
  sysbus: Expose IRQ enumeration helpers
  sysbus: Make devices spawnable via -device
  sysbus: Add dynamic sysbus device search
  hw/ppc/spapr_pci.c: Avoid functions not in glib 2.12 (g_hash_table_iter_*)
  ppc: do not look at the MMU index to detect PR/HV mode
  target-ppc: kvm: Fix memory overflow issue about strncat()
  spapr_nvram: Enable migration
  PPC: E500: Hook up power off GPIO to GPIO controller
  PPC: E500: Instantiate MPC8XXX gpio controller on virt machine
  PPC: Add MPC8XXX gpio controller
  target-ppc: Fix an invalid free in opcode table handling code.
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/d5b4dc3b5017...c8d943303d5d
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