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Re: [Qemu-block] [Qemu-devel] [PATCH v5 11/28] hw/block/pflash_cfi02: Un
From: |
Alistair Francis |
Subject: |
Re: [Qemu-block] [Qemu-devel] [PATCH v5 11/28] hw/block/pflash_cfi02: Unify the MemoryRegionOps |
Date: |
Fri, 28 Jun 2019 09:25:42 -0700 |
On Thu, Jun 27, 2019 at 1:37 PM Philippe Mathieu-Daudé
<address@hidden> wrote:
>
> The pflash_read()/pflash_write() can check the device endianess
> via the pfl->be variable, so remove the 'int be' argument.
>
> Since the big/little MemoryRegionOps are now identical, it is
> pointless to declare them both. Unify them.
>
> Signed-off-by: Stephen Checkoway <address@hidden>
> Message-Id: <address@hidden>
> Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
> Tested-by: Philippe Mathieu-Daudé <address@hidden>
> [PMD: Extracted from bigger patch to ease review]
> Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Nice cleanup!
Reviewed-by: Alistair Francis <address@hidden>
Alistair
> ---
> hw/block/pflash_cfi02.c | 60 +++++++++++------------------------------
> 1 file changed, 15 insertions(+), 45 deletions(-)
>
> diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
> index c079a63880..e64dc69c6c 100644
> --- a/hw/block/pflash_cfi02.c
> +++ b/hw/block/pflash_cfi02.c
> @@ -177,11 +177,11 @@ static uint64_t pflash_data_read(PFlashCFI02 *pfl,
> hwaddr offset,
> return ret;
> }
>
> -static uint32_t pflash_read(PFlashCFI02 *pfl, hwaddr offset,
> - int width, int be)
> +static uint64_t pflash_read(void *opaque, hwaddr offset, unsigned int width)
> {
> + PFlashCFI02 *pfl = opaque;
> hwaddr boff;
> - uint32_t ret;
> + uint64_t ret;
>
> ret = -1;
> /* Lazy reset to ROMD mode after a certain amount of read accesses */
> @@ -228,14 +228,14 @@ static uint32_t pflash_read(PFlashCFI02 *pfl, hwaddr
> offset,
> default:
> ret = pflash_data_read(pfl, offset, width);
> }
> - DPRINTF("%s: ID " TARGET_FMT_plx " %" PRIx32 "\n", __func__, boff,
> ret);
> + DPRINTF("%s: ID " TARGET_FMT_plx " %" PRIx64 "\n", __func__, boff,
> ret);
> break;
> case 0xA0:
> case 0x10:
> case 0x30:
> /* Status register read */
> ret = pfl->status;
> - DPRINTF("%s: status %" PRIx32 "\n", __func__, ret);
> + DPRINTF("%s: status %" PRIx64 "\n", __func__, ret);
> toggle_dq6(pfl);
> break;
> case 0x98:
> @@ -253,8 +253,7 @@ static uint32_t pflash_read(PFlashCFI02 *pfl, hwaddr
> offset,
> }
>
> /* update flash content on disk */
> -static void pflash_update(PFlashCFI02 *pfl, int offset,
> - int size)
> +static void pflash_update(PFlashCFI02 *pfl, int offset, int size)
> {
> int offset_end;
> if (pfl->blk) {
> @@ -267,9 +266,10 @@ static void pflash_update(PFlashCFI02 *pfl, int offset,
> }
> }
>
> -static void pflash_write(PFlashCFI02 *pfl, hwaddr offset,
> - uint32_t value, int width, int be)
> +static void pflash_write(void *opaque, hwaddr offset, uint64_t value,
> + unsigned int width)
> {
> + PFlashCFI02 *pfl = opaque;
> hwaddr boff;
> uint8_t *p;
> uint8_t cmd;
> @@ -477,39 +477,9 @@ static void pflash_write(PFlashCFI02 *pfl, hwaddr offset,
> pfl->cmd = 0;
> }
>
> -static uint64_t pflash_be_readfn(void *opaque, hwaddr addr, unsigned size)
> -{
> - return pflash_read(opaque, addr, size, 1);
> -}
> -
> -static void pflash_be_writefn(void *opaque, hwaddr addr,
> - uint64_t value, unsigned size)
> -{
> - pflash_write(opaque, addr, value, size, 1);
> -}
> -
> -static uint64_t pflash_le_readfn(void *opaque, hwaddr addr, unsigned size)
> -{
> - return pflash_read(opaque, addr, size, 0);
> -}
> -
> -static void pflash_le_writefn(void *opaque, hwaddr addr,
> - uint64_t value, unsigned size)
> -{
> - pflash_write(opaque, addr, value, size, 0);
> -}
> -
> -static const MemoryRegionOps pflash_cfi02_ops_be = {
> - .read = pflash_be_readfn,
> - .write = pflash_be_writefn,
> - .valid.min_access_size = 1,
> - .valid.max_access_size = 4,
> - .endianness = DEVICE_NATIVE_ENDIAN,
> -};
> -
> -static const MemoryRegionOps pflash_cfi02_ops_le = {
> - .read = pflash_le_readfn,
> - .write = pflash_le_writefn,
> +static const MemoryRegionOps pflash_cfi02_ops = {
> + .read = pflash_read,
> + .write = pflash_write,
> .valid.min_access_size = 1,
> .valid.max_access_size = 4,
> .endianness = DEVICE_NATIVE_ENDIAN,
> @@ -537,9 +507,9 @@ static void pflash_cfi02_realize(DeviceState *dev, Error
> **errp)
>
> chip_len = pfl->sector_len * pfl->nb_blocs;
>
> - memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl), pfl->be ?
> - &pflash_cfi02_ops_be :
> &pflash_cfi02_ops_le,
> - pfl, pfl->name, chip_len, &local_err);
> + memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl),
> + &pflash_cfi02_ops, pfl, pfl->name,
> + chip_len, &local_err);
> if (local_err) {
> error_propagate(errp, local_err);
> return;
> --
> 2.20.1
>
>
- Re: [Qemu-block] [Qemu-devel] [PATCH v5 05/28] hw/block/pflash_cfi02: Add an enum to define the write cycles, (continued)
- [Qemu-block] [PATCH v5 06/28] hw/block/pflash_cfi02: Add helpers to manipulate the status bits, Philippe Mathieu-Daudé, 2019/06/27
- [Qemu-block] [PATCH v5 07/28] hw/block/pflash_cfi02: Simplify a statement using fall through, Philippe Mathieu-Daudé, 2019/06/27
- [Qemu-block] [PATCH v5 08/28] hw/block/pflash_cfi02: Use the ldst API in pflash_write(), Philippe Mathieu-Daudé, 2019/06/27
- [Qemu-block] [PATCH v5 09/28] hw/block/pflash_cfi02: Use the ldst API in pflash_read(), Philippe Mathieu-Daudé, 2019/06/27
- [Qemu-block] [PATCH v5 11/28] hw/block/pflash_cfi02: Unify the MemoryRegionOps, Philippe Mathieu-Daudé, 2019/06/27
- Re: [Qemu-block] [Qemu-devel] [PATCH v5 11/28] hw/block/pflash_cfi02: Unify the MemoryRegionOps,
Alistair Francis <=
- [Qemu-block] [PATCH v5 10/28] hw/block/pflash_cfi02: Extract the pflash_data_read() function, Philippe Mathieu-Daudé, 2019/06/27
- [Qemu-block] [PATCH v5 12/28] hw/block/pflash_cfi02: Fix command address comparison, Philippe Mathieu-Daudé, 2019/06/27
- [Qemu-block] [PATCH v5 13/28] tests/pflash-cfi02: Refactor to support testing multiple configurations, Philippe Mathieu-Daudé, 2019/06/27
- [Qemu-block] [PATCH v5 14/28] hw/block/pflash_cfi02: Remove pointless local variable, Philippe Mathieu-Daudé, 2019/06/27
- [Qemu-block] [PATCH v5 15/28] hw/block/pflash_cfi02: Document the current CFI values, Philippe Mathieu-Daudé, 2019/06/27