Re: CXL Namespaces of ACPI disappearing in Qemu demo

[Jonathan Cameron]

On Thu, 10 Aug 2023 11:04:29 +0100
Jonathan Cameron <Jonathan.Cameron@Huawei.com> wrote:

> On Thu, 10 Aug 2023 17:30:43 +0800
> Yuquan Wang <wangyuquan1236@phytium.com.cn> wrote:
> 
> > Hi, Jonathan
> > 
> > When I tested the CXL topology in qemu, I found the linux kernel could find 
> > and match the ACPI0016&ACPI0017 in relevant drivers, however, I could not 
> > find these information in dumped ACPI tables (like DSDT). 
> > 
> > Hence, I guess there is some problem in my method, maybe you have some 
> > suggestions if you have some time to look at this email.
> > 
> > My environment:
> > qemu: Jonathan_qemu/cxl-2023-08-07
> > Linux: v6.3.0
> > ACPI Disassembler: iasl/version 20230628
> > 
> > My qemu script is the same as the first example innn 
> > qemu/docs/system/devices/cxl.rst, 
> > as below:
> >   qemu-system-x86_64 -M q35,cxl=on -m 4G,maxmem=8G,slots=8 -smp 4 \
> >   ...
> >   -object 
> > memory-backend-file,id=cxl-mem1,share=on,mem-path=/tmp/cxltest.raw,size=256M
> >  \
> >   -object 
> > memory-backend-file,id=cxl-lsa1,share=on,mem-path=/tmp/lsa.raw,size=256M \
> >   -device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \
> >   -device cxl-rp,port=0,bus=cxl.1,id=root_port13,chassis=0,slot=2 \
> >   -device 
> > cxl-type3,bus=root_port13,persistent-memdev=cxl-mem1,lsa=cxl-lsa1,id=cxl-pmem0
> >  \
> >   -M cxl-fmw.0.targets.0=cxl.1,cxl-fmw.0.size=4G  
> 
> Hi Yuquan,
> 
> Ah. I may have messed up dropping a patch set that was factoring out all the 
> PXB stuff to SSDT
> in my latest tree.
> 
> I dropped it because it was nasty to rebase and didn’t seem likely to go 
> upstream particularly
> quickly as we pushed the decision on it back behind a load of other PCI 
> changes.
> 
> I tested the latest tree heavily on arm, but was lazy on the x86 front :(
> as I forgot that that change might have broken things (and all the new stuff 
> was architecture
> agnostic).
> 
> Right now for x86 tests with my tree I'm getting a freeze on booting so some 
> debug needed.
> Even better, on upstream qemu with near vanilla kernel I get a segfault 
> instead in pretty
> much the same place.
> This is going to be a 'fun' day I guess. 

I haven't gotten very far with that other issue (beyond reporting where the 
segfault was)
but in the meantime I can boot machines as long as they only have one core.

So took a look at your issue - be it on the cxl-2023-08-07 branch rebased on 
qemu/master
from today (side effect of looking at the segfault that was stopping me getting 
to this).

For me at least the branch does create an ACPI0017 DSDT entry and an ACPI0016 
one
and all the CXL devices turn up in /sys/bus/cxl/devices as expected.

So I'm afraid I have no idea what is going wrong for you :(  Maybe you are 
running
a BIOS that is overwriting them? - I'm just using the default from the same 
qemu build.

Jonathan


> 
> Jonathan
> 
> 
> 
> > 
> > 
> > Many thanks
> > Yuquan  
>