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[PATCH v3 13/17] target/arm: Change gen_exception_internal to work on di
From: |
Richard Henderson |
Subject: |
[PATCH v3 13/17] target/arm: Change gen_exception_internal to work on displacements |
Date: |
Mon, 22 Aug 2022 16:23:34 -0700 |
In preparation for TARGET_TB_PCREL, reduce reliance on absolute values.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-a64.c | 6 +++---
target/arm/translate.c | 10 +++++-----
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 422ce9288d..b777742643 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -340,9 +340,9 @@ static void gen_exception_internal(int excp)
gen_helper_exception_internal(cpu_env, tcg_constant_i32(excp));
}
-static void gen_exception_internal_insn(DisasContext *s, uint64_t pc, int excp)
+static void gen_exception_internal_insn(DisasContext *s, int pc_diff, int excp)
{
- gen_a64_update_pc(s, pc - s->pc_curr);
+ gen_a64_update_pc(s, pc_diff);
gen_exception_internal(excp);
s->base.is_jmp = DISAS_NORETURN;
}
@@ -2229,7 +2229,7 @@ static void disas_exc(DisasContext *s, uint32_t insn)
break;
}
#endif
- gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
+ gen_exception_internal_insn(s, 0, EXCP_SEMIHOST);
} else {
unallocated_encoding(s);
}
diff --git a/target/arm/translate.c b/target/arm/translate.c
index d441e31d3a..63a41ed438 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -1078,10 +1078,10 @@ static inline void gen_smc(DisasContext *s)
s->base.is_jmp = DISAS_SMC;
}
-static void gen_exception_internal_insn(DisasContext *s, uint32_t pc, int excp)
+static void gen_exception_internal_insn(DisasContext *s, int pc_diff, int excp)
{
gen_set_condexec(s);
- gen_update_pc(s, pc - s->pc_curr);
+ gen_update_pc(s, pc_diff);
gen_exception_internal(excp);
s->base.is_jmp = DISAS_NORETURN;
}
@@ -1175,7 +1175,7 @@ static inline void gen_hlt(DisasContext *s, int imm)
s->current_el != 0 &&
#endif
(imm == (s->thumb ? 0x3c : 0xf000))) {
- gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
+ gen_exception_internal_insn(s, 0, EXCP_SEMIHOST);
return;
}
@@ -6565,7 +6565,7 @@ static bool trans_BKPT(DisasContext *s, arg_BKPT *a)
!IS_USER(s) &&
#endif
(a->imm == 0xab)) {
- gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
+ gen_exception_internal_insn(s, 0, EXCP_SEMIHOST);
} else {
gen_exception_bkpt_insn(s, syn_aa32_bkpt(a->imm, false));
}
@@ -8773,7 +8773,7 @@ static bool trans_SVC(DisasContext *s, arg_SVC *a)
!IS_USER(s) &&
#endif
(a->imm == semihost_imm)) {
- gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
+ gen_exception_internal_insn(s, 0, EXCP_SEMIHOST);
} else {
gen_update_pc(s, curr_insn_len(s));
s->svc_imm = a->imm;
--
2.34.1
- [PATCH v3 00/17] accel/tcg + target/arm: pc-relative translation, Richard Henderson, 2022/08/22
- [PATCH v3 01/17] accel/tcg: Remove PageDesc code_bitmap, Richard Henderson, 2022/08/22
- [PATCH v3 03/17] accel/tcg: Use DisasContextBase in plugin_gen_tb_start, Richard Henderson, 2022/08/22
- [PATCH v3 04/17] accel/tcg: Do not align tb->page_addr[0], Richard Henderson, 2022/08/22
- [PATCH v3 02/17] accel/tcg: Use bool for page_find_alloc, Richard Henderson, 2022/08/22
- [PATCH v3 05/17] include/hw/core: Create struct CPUJumpCache, Richard Henderson, 2022/08/22
- [PATCH v3 13/17] target/arm: Change gen_exception_internal to work on displacements,
Richard Henderson <=
- [PATCH v3 14/17] target/arm: Change gen_jmp* to work on displacements, Richard Henderson, 2022/08/22
- [PATCH v3 11/17] target/arm: Change gen_*set_pc_im to gen_*update_pc, Richard Henderson, 2022/08/22
- [PATCH v3 15/17] target/arm: Introduce gen_pc_plus_diff for aarch64, Richard Henderson, 2022/08/22
- [PATCH v3 07/17] accel/tcg: Introduce TARGET_TB_PCREL, Richard Henderson, 2022/08/22
- [PATCH v3 08/17] accel/tcg: Split log_cpu_exec into inline and slow path, Richard Henderson, 2022/08/22
- [PATCH v3 12/17] target/arm: Change gen_exception_insn* to work on displacements, Richard Henderson, 2022/08/22
- [PATCH v3 09/17] target/arm: Introduce curr_insn_len, Richard Henderson, 2022/08/22
- [PATCH v3 06/17] accel/tcg: Introduce tb_pc and tb_pc_log, Richard Henderson, 2022/08/22
- [PATCH v3 10/17] target/arm: Change gen_goto_tb to work on displacements, Richard Henderson, 2022/08/22
- [PATCH v3 16/17] target/arm: Introduce gen_pc_plus_diff for aarch32, Richard Henderson, 2022/08/22